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Thu, 29 May 2025 10:11:17 -0700 (PDT) From: Kevin Hilman To: s-vadapalli@ti.com, Frank Li Cc: bhelgaas@google.com, conor+dt@kernel.org, devicetree@vger.kernel.org, krzk+dt@kernel.org, kw@linux.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-pci@vger.kernel.org, lpieralisi@kernel.org, manivannan.sadhasivam@linaro.org, robh@kernel.org, tony@atomide.com, vigneshr@ti.com In-Reply-To: <20250411153454.3258098-1-Frank.Li@nxp.com> References: <20250411153454.3258098-1-Frank.Li@nxp.com> Subject: Re: [PATCH v2 1/1] Revert "ARM: dts: Update pcie ranges for dra7" Message-Id: <174853867693.3632160.17627654159190851191.b4-ty@baylibre.com> Date: Thu, 29 May 2025 10:11:16 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Mailer: b4 0.14.3-dev-d7477 On Fri, 11 Apr 2025 11:34:54 -0400, Frank Li wrote: > This reverts commit c761028ef5e27f477fe14d2b134164c584fc21ee. > > The commit being reverted updated the "ranges" property for the sake of > readability. However, this change is no longer appropriate due to the > following reasons: > > - On many SoCs, the PCIe parent bus translates CPU addresses to different > values before passing them to the PCIe controller. > - The reverted commit introduced a fake address translation, which violates > the fundamental DTS principle: the device tree should reflect actual > hardware behavior. > > [...] Applied, thanks! [1/1] Revert "ARM: dts: Update pcie ranges for dra7" commit: 8c178057e734188eeeceaec33848eaca2766ca07 Best regards, -- Kevin Hilman