From: Vinod Koul <vkoul@kernel.org>
To: kishon@kernel.org, christophe.jaillet@wanadoo.fr,
sjakhade@cadence.com, bwawrzyn@cisco.com,
u.kleine-koenig@baylibre.com, krzysztof.kozlowski@linaro.org,
Siddharth Vadapalli <s-vadapalli@ti.com>
Cc: linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, srk@ti.com
Subject: Re: [PATCH] phy: cadence: Sierra: Add PCIe + USB PHY multilink configuration
Date: Sun, 15 Jun 2025 22:22:33 +0530 [thread overview]
Message-ID: <175000635358.1180927.3012221075684762895.b4-ty@kernel.org> (raw)
In-Reply-To: <20250610130133.2102196-1-s-vadapalli@ti.com>
On Tue, 10 Jun 2025 18:31:33 +0530, Siddharth Vadapalli wrote:
> Add register sequences for PCIe + USB multilink configuration for
> Sierra PHY.
>
>
Applied, thanks!
[1/1] phy: cadence: Sierra: Add PCIe + USB PHY multilink configuration
commit: 6767df73f2d36e7d1cf0eb3c4d9469c7e9fe9824
Best regards,
--
~Vinod
prev parent reply other threads:[~2025-06-15 16:52 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-10 13:01 Siddharth Vadapalli
2025-06-13 9:19 ` neil.armstrong
2025-06-15 16:52 ` Vinod Koul [this message]
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