From: Vinod Koul <vkoul@kernel.org>
To: Kishon Vijay Abraham I <kishon@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Mrinmay Sarkar <mrinmay.sarkar@oss.qualcomm.com>
Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
krishna.chundru@oss.qualcomm.com, quic_vbadigan@quicinc.com,
quic_nayiluri@quicinc.com, quic_ramkri@quicinc.com,
quic_nitegupt@quicinc.com,
Mrinmay Sarkar <quic_msarkar@quicinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Subject: Re: (subset) [PATCH v5 0/2] Update PCIe PHY settings for QCS8300 and SA8775P
Date: Thu, 26 Jun 2025 17:47:07 -0700 [thread overview]
Message-ID: <175098522717.106297.12993468962065635081.b4-ty@kernel.org> (raw)
In-Reply-To: <20250617-update_phy-v5-0-2df83ed6a373@quicinc.com>
On Tue, 17 Jun 2025 17:08:18 +0530, Mrinmay Sarkar wrote:
> This Series is to update PCIe PHY settings as per latest
> hardware programming guide and remove max link speed dt
> property for SA8775P PCIe EP.
>
>
Applied, thanks!
[1/2] phy: qcom: qmp-pcie: Update PHY settings for QCS8300 & SA8775P
commit: 03aa45d6c62d6861dcbcff627d88814c0ddecc88
Best regards,
--
~Vinod
next prev parent reply other threads:[~2025-06-27 0:47 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-17 11:38 Mrinmay Sarkar
2025-06-17 11:38 ` [PATCH v5 1/2] phy: qcom: qmp-pcie: Update PHY settings for QCS8300 & SA8775P Mrinmay Sarkar
2025-06-17 11:38 ` [PATCH v5 2/2] arm64: dts: qcom: sa8775p: Remove max link speed property for PCIe EP Mrinmay Sarkar
2025-06-27 0:47 ` Vinod Koul [this message]
2025-08-12 21:13 ` (subset) [PATCH v5 0/2] Update PCIe PHY settings for QCS8300 and SA8775P Bjorn Andersson
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