From: Heiko Stuebner <heiko@sntech.de>
To: Sandy Huang <hjc@rock-chips.com>,
Andy Yan <andy.yan@rock-chips.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Cc: Heiko Stuebner <heiko@sntech.de>,
kernel@collabora.com, Andy Yan <andyshrk@163.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
stable@vger.kernel.org
Subject: Re: (subset) [PATCH 0/3] arm64: dts: rockchip: Fix HDMI output on RK3576
Date: Mon, 30 Jun 2025 11:45:43 +0200 [thread overview]
Message-ID: <175127673170.138768.2750019660187884094.b4-ty@sntech.de> (raw)
In-Reply-To: <20250612-rk3576-hdmitx-fix-v1-0-4b11007d8675@collabora.com>
On Thu, 12 Jun 2025 00:47:46 +0300, Cristian Ciocaltea wrote:
> Since commit c871a311edf0 ("phy: rockchip: samsung-hdptx: Setup TMDS
> char rate via phy_configure_opts_hdmi"), the workaround of passing the
> PHY rate from DW HDMI QP bridge driver via phy_set_bus_width() became
> partially broken, unless the rate adjustment is done as with RK3588,
> i.e. by CCF from VOP2.
>
> Attempting to fix this up at PHY level would not only introduce
> additional hacks, but it would also fail to adequately resolve the
> display issues that are a consequence of the system CRU limitations.
>
> [...]
Applied, thanks!
[2/3] arm64: dts: rockchip: Enable HDMI PHY clk provider on rk3576
commit: aba7987a536cee67fb0cb724099096fd8f8f5350
[3/3] arm64: dts: rockchip: Add HDMI PHY PLL clock source to VOP2 on rk3576
commit: 4ab8b8ac952fb08d03655e1da0cfee07589e428f
Best regards,
--
Heiko Stuebner <heiko@sntech.de>
prev parent reply other threads:[~2025-06-30 9:46 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-11 21:47 Cristian Ciocaltea
2025-06-11 21:47 ` [PATCH 1/3] dt-bindings: display: vop2: Add optional PLL clock property for rk3576 Cristian Ciocaltea
2025-06-26 23:24 ` Rob Herring (Arm)
2025-06-11 21:47 ` [PATCH 2/3] arm64: dts: rockchip: Enable HDMI PHY clk provider on rk3576 Cristian Ciocaltea
2025-06-11 21:47 ` [PATCH 3/3] arm64: dts: rockchip: Add HDMI PHY PLL clock source to VOP2 " Cristian Ciocaltea
2025-06-12 0:00 ` Detlev Casanova
2025-06-12 5:51 ` Cristian Ciocaltea
2025-06-12 10:22 ` Piotr Oniszczuk
2025-06-12 11:04 ` Cristian Ciocaltea
2025-06-12 12:13 ` [PATCH 0/3] arm64: dts: rockchip: Fix HDMI output on RK3576 Nicolas Frattaroli
2025-06-12 12:30 ` Cristian Ciocaltea
2025-06-30 9:14 ` (subset) " Heiko Stuebner
2025-06-30 9:45 ` Heiko Stuebner [this message]
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