Re: [PATCH v14 1/5] dt-bindings: serial: renesas,rsci: Add optional secondary clock input

["Rob Herring (Arm)" <robh@kernel.org>]

On Mon, 30 Jun 2025 21:23:19 +0100, Prabhakar wrote:
> From: Thierry Bultel <thierry.bultel.yh@bp.renesas.com>
> 
> Update the RSCI binding to support an optional secondary clock input on
> the RZ/T2H SoC. At boot, the RSCI operates using the default synchronous
> clock (PCLKM core clock), which is enabled by the bootloader. However, to
> support a wider range of baud rates, the hardware also requires an
> asynchronous external clock input. Clock selection is controlled
> internally by the CCR3 register in the RSCI block.
> 
> Due to an incomplete understanding of the hardware, the original binding
> defined only a single clock ("fck"), which is insufficient to describe the
> full capabilities of the RSCI on RZ/T2H. This update corrects the binding
> by allowing up to three clocks and defining the `clock-names` as
> "operation", "bus", and optionally "sck" for the asynchronous clock input.
> 
> This is an ABI change, as it modifies the expected number and names of
> clocks. However, since there are no in-kernel consumers of this binding
> yet, the change is considered safe and non-disruptive.
> 
> Also remove the unneeded `serial0` alias from the DTS example and use
> the R9A09G077_CLK_PCLKM macro for core clock.
> 
> Signed-off-by: Thierry Bultel <thierry.bultel.yh@bp.renesas.com>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v13->v14:
> - Dropped using `R9A09G077_CLK_PCLKM` macro in binding.
> 
> v12->v13:
> - Rebased on latest linux-next.
> - Updated commit message to clarify the ABI change.
> - Used `R9A09G077_CLK_PCLKM` macro for core clock
> ---
>  .../bindings/serial/renesas,rsci.yaml           | 17 +++++++++--------
>  1 file changed, 9 insertions(+), 8 deletions(-)
> 

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>