[PATCH 1/2] x86/build: only align ENTRY_TEXT to PMD_SIZE if necessary

[Hamza Mahfooz <hamzamahfooz@linux.microsoft.com>]

PTI requires the begin and end of ENTRY_TEXT be aligned to PMD_SIZE.
SRSO requires srso_alias_untrain_ret to be 2M aligned. This costs
between 2-4 MiB of RAM (depending on the size of the preceding section).
So, only align when PTI is enabled or SRSO is enabled.

Co-developed-by: Jared White <jaredwhite@microsoft.com>
Signed-off-by: Jared White <jaredwhite@microsoft.com>
Signed-off-by: Hamza Mahfooz <hamzamahfooz@linux.microsoft.com>
---
 arch/x86/kernel/vmlinux.lds.S | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S
index 4fa0be732af1..522297cebe7c 100644
--- a/arch/x86/kernel/vmlinux.lds.S
+++ b/arch/x86/kernel/vmlinux.lds.S
@@ -65,8 +65,13 @@ const_cpu_current_top_of_stack = cpu_current_top_of_stack;
 		__end_rodata_hpage_align = .;			\
 		__end_rodata_aligned = .;
 
+#if defined(CONFIG_MITIGATION_PAGE_TABLE_ISOLATION) || defined(CONFIG_MITIGATION_SRSO)
 #define ALIGN_ENTRY_TEXT_BEGIN	. = ALIGN(PMD_SIZE);
 #define ALIGN_ENTRY_TEXT_END	. = ALIGN(PMD_SIZE);
+#else
+#define ALIGN_ENTRY_TEXT_BEGIN
+#define ALIGN_ENTRY_TEXT_END
+#endif
 
 /*
  * This section contains data which will be mapped as decrypted. Memory
-- 
2.49.0