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From: Andrew Jeffery <andrew@codeconstruct.com.au>
To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
	 conor+dt@kernel.org, avifishman70@gmail.com,
	tali.perry1@gmail.com,  joel@jms.id.au, venture@google.com,
	yuenn@google.com,  benjaminfair@google.com,
	Tomer Maimon <tmaimon77@gmail.com>
Cc: openbmc@lists.ozlabs.org, devicetree@vger.kernel.org,
	 linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 0/2] NPCM845 reset and clock device tree updates
Date: Mon, 21 Jul 2025 12:26:06 +0930	[thread overview]
Message-ID: <175306656659.1278425.12587512480138536293.b4-ty@codeconstruct.com.au> (raw)
In-Reply-To: <20250706134207.2168184-1-tmaimon77@gmail.com>

On Sun, 06 Jul 2025 16:42:05 +0300, Tomer Maimon wrote:
> This series updates the NPCM845 device tree for the integrated reset and
> clock controller using the auxiliary device framework.
> Patch 1 combines the reset and clock nodes into nuvoton,npcm845-reset.
> Patch 2 adds a 25 MHz refclk and updates peripherals to use it.
> 
> Tested on NPCM845 evaluation board.
> 
> [...]

Thanks, I've applied this to be picked up through the BMC tree.

-- 
Andrew Jeffery <andrew@codeconstruct.com.au>


      parent reply	other threads:[~2025-07-21  2:56 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-06 13:42 Tomer Maimon
2025-07-06 13:42 ` [PATCH v1 1/2] arm64: dts: nuvoton: combine NPCM845 reset and clk nodes Tomer Maimon
2025-07-06 13:42 ` [PATCH v1 2/2] arm64: dts: nuvoton: add refclk and update peripheral clocks for NPCM845 Tomer Maimon
2025-07-21  2:56 ` Andrew Jeffery [this message]

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