From: "Rob Herring (Arm)" <robh@kernel.org>
To: Florian Fainelli <florian.fainelli@broadcom.com>
Cc: Krzysztof Kozlowski <krzk@kernel.org>,
linux-arm-kernel@lists.infradead.org,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Conor Dooley <conor+dt@kernel.org>,
linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org,
Broadcom internal kernel review list
<bcm-kernel-feedback-list@broadcom.com>,
devicetree@vger.kernel.org
Subject: Re: [PATCH 1/2] dt-bindings: memory: Update brcmstb-memc-ddr binding with older chips
Date: Wed, 30 Jul 2025 17:30:12 -0500 [thread overview]
Message-ID: <175391461181.1819073.14169607307672802524.robh@kernel.org> (raw)
In-Reply-To: <20250729205213.3392481-2-florian.fainelli@broadcom.com>
On Tue, 29 Jul 2025 13:52:12 -0700, Florian Fainelli wrote:
> The older MIPS-based chips incorporated a memory controller with the
> revision A.0.0, update the binding to list that compatible.
>
> Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
> ---
> .../bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml | 4 ++++
> 1 file changed, 4 insertions(+)
>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
next prev parent reply other threads:[~2025-07-30 22:30 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-29 20:52 [PATCH 0/2] brcmstb-memc-ddr binding updates for MIPS boards Florian Fainelli
2025-07-29 20:52 ` [PATCH 1/2] dt-bindings: memory: Update brcmstb-memc-ddr binding with older chips Florian Fainelli
2025-07-30 22:30 ` Rob Herring (Arm) [this message]
2025-08-13 10:36 ` (subset) " Krzysztof Kozlowski
2025-07-29 20:52 ` [PATCH 2/2] MIPS: BMIPS: Properly define memory controller compatible Florian Fainelli
2025-08-29 10:21 ` [PATCH 0/2] brcmstb-memc-ddr binding updates for MIPS boards Thomas Bogendoerfer
2025-08-29 10:37 ` Krzysztof Kozlowski
2025-08-29 10:39 ` Krzysztof Kozlowski
2025-08-29 15:36 ` Thomas Bogendoerfer
2025-08-29 16:31 ` Florian Fainelli
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