From: Bjorn Andersson <andersson@kernel.org>
To: Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Odelu Kukatla <quic_okukatla@quicinc.com>,
Imran Shaik <quic_imrashai@quicinc.com>,
Mike Titpon <mike.tipton@oss.qualcomm.com>,
Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: (subset) [PATCH V3 0/1] Add EPSS L3 provider support on QCS8300 SoC
Date: Mon, 11 Aug 2025 18:27:09 -0500 [thread overview]
Message-ID: <175495482433.157244.13963673441225583796.b4-ty@kernel.org> (raw)
In-Reply-To: <20250722055039.135140-1-raviteja.laggyshetty@oss.qualcomm.com>
On Tue, 22 Jul 2025 05:50:38 +0000, Raviteja Laggyshetty wrote:
> Add Epoch subsystem (EPSS) L3 scaling support on QCS8300 SoC.
>
> Changes since V2:
> - Dropped the dt-binding patch from series, as it has been picked into
> linux-next
> https://lore.kernel.org/all/20250711102540.143-2-raviteja.laggyshetty@oss.qualcomm.com/
> - Squashed EPSS L3 provider node changes and CPU OPP table changes into
> single patch [Konrad].
> - Link to v2: https://lore.kernel.org/all/20250711102540.143-1-raviteja.laggyshetty@oss.qualcomm.com/
>
> [...]
Applied, thanks!
[1/1] arm64: dts: qcom: qcs8300: Add EPSS l3 interconnect provider node and CPUCP OPP tables to scale DDR/L3
commit: bebacd802b51fae87e04a0f2b6eeb66ac259c14e
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
prev parent reply other threads:[~2025-08-11 23:27 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-22 5:50 Raviteja Laggyshetty
2025-07-22 5:50 ` [PATCH V3 1/1] arm64: dts: qcom: qcs8300: Add EPSS l3 interconnect provider node and CPUCP OPP tables to scale DDR/L3 Raviteja Laggyshetty
2025-07-22 6:25 ` Dmitry Baryshkov
2025-08-11 23:27 ` Bjorn Andersson [this message]
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