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From: Bjorn Andersson <andersson@kernel.org>
To: Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Mrinmay Sarkar <mrinmay.sarkar@oss.qualcomm.com>
Cc: linux-kernel@vger.kernel.org,
	linux-arm-msm@vger.kernel.org,
	linux-phy@lists.infradead.org,
	devicetree@vger.kernel.org,
	krishna.chundru@oss.qualcomm.com,
	quic_vbadigan@quicinc.com,
	quic_nayiluri@quicinc.com,
	quic_ramkri@quicinc.com,
	quic_nitegupt@quicinc.com,
	Mrinmay Sarkar <quic_msarkar@quicinc.com>,
	Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Subject: Re: (subset) [PATCH v5 0/2] Update PCIe PHY settings for QCS8300 and SA8775P
Date: Tue, 12 Aug 2025 16:13:47 -0500
Message-ID: <175503322856.231048.14752083569105388831.b4-ty@kernel.org>
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On Tue, 17 Jun 2025 17:08:18 +0530, Mrinmay Sarkar wrote:
> This Series is to update PCIe PHY settings as per latest
> hardware programming guide and remove max link speed dt
> property for SA8775P PCIe EP.
> 
> 

Applied, thanks!

[2/2] arm64: dts: qcom: sa8775p: Remove max link speed property for PCIe EP
      commit: d6111177f6504b013d0424657e131ae9a36ab5e2

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>