From: Leon Romanovsky <leon@kernel.org>
To: Saeed Mahameed <saeedm@nvidia.com>, Tariq Toukan <tariqt@nvidia.com>
Cc: Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>,
Paolo Abeni <pabeni@redhat.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Mark Bloch <mbloch@nvidia.com>,
netdev@vger.kernel.org, linux-rdma@vger.kernel.org,
linux-kernel@vger.kernel.org, Gal Pressman <gal@nvidia.com>,
Vadim Fedorenko <vadim.fedorenko@linux.dev>,
Dragos Tatulea <dtatulea@nvidia.com>,
Carolina Jubran <cjubran@nvidia.com>,
Yael Chemla <ychemla@nvidia.com>
Subject: Re: [PATCH mlx5-next] net/mlx5: Add RS FEC histogram infrastructure
Date: Tue, 09 Sep 2025 04:19:06 -0400 [thread overview]
Message-ID: <175740594613.474749.6222291255125007761.b4-ty@kernel.org> (raw)
In-Reply-To: <1756884600-520195-1-git-send-email-tariqt@nvidia.com>
On Wed, 03 Sep 2025 10:30:00 +0300, Tariq Toukan wrote:
> Define the Ports Phy Histogram Configuration Register (PPHCR) to expose
> RS-FEC histogram bin ranges, and expose a new counter group in the Ports
> Performance Counters Register (PPCNT) to report the corresponding
> histogram values.
>
>
Applied, thanks!
[1/1] net/mlx5: Add RS FEC histogram infrastructure
https://git.kernel.org/rdma/rdma/c/ff97bc38be343e
Best regards,
--
Leon Romanovsky <leon@kernel.org>
prev parent reply other threads:[~2025-09-09 8:19 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-03 7:30 Tariq Toukan
2025-09-09 8:19 ` Leon Romanovsky [this message]
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