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Sun, 28 Sep 2025 14:13:24 -0700 From: Tariq Toukan To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" CC: Leon Romanovsky , Saeed Mahameed , Tariq Toukan , Mark Bloch , , , , Moshe Shemesh , "Gal Pressman" Subject: [pull-request] mlx5-next updates 2025-09-28 Date: Mon, 29 Sep 2025 00:13:09 +0300 Message-ID: <1759093989-841873-1-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF000099D9:EE_|BN7PPFEE0F400A9:EE_ X-MS-Office365-Filtering-Correlation-Id: 131a3b5e-0556-49fa-3df8-08ddfed3e67d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|82310400026|36860700013; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?k1MhRU3RZs276SmQR13TASkeNuyVM/kqONq9VVt/f+A6ctWRHKoIV2bCIiab?= =?us-ascii?Q?mD79k9sf9w40C0vX5t+plnmw/LEnwiFDE0STOrrzYwh8EywrHxTLhGxC4QFN?= =?us-ascii?Q?i5zagiYIntNlIwyzB7wa8x/WG2SQ9Ob2htbLj0biVHKzHW5YJF5/NV+t4tP+?= =?us-ascii?Q?oVdbjT1IMjyo0DMgl/nB6s9EwLBEvEacT1GqwyCtP98c8Cb1o252R8oNy7Hx?= =?us-ascii?Q?VRfp9ASOnWf0HUDKnOcJ04US/hwOdK+o69B9HcjhCZM/bPkk6vylRm7qBGF4?= =?us-ascii?Q?/7WLhg7YQ3kid+WdkK3HMscELtTjD7CR40ZHA0Hw+REIBDRAcxlIeyxWw3Hc?= =?us-ascii?Q?I7cfqucETKGr12DNboCKTNIfpygUlffvFkfBQfSUIzvaicNUdwcVv4SWdTDM?= =?us-ascii?Q?MuQ3ZXOgxa+bUQNP85Ez0bKABW/BYe7E2k0lBLxb5shbvQRvFgUgC9CuZk8B?= =?us-ascii?Q?Y2JYhpAyfnL14Lpt5g5LuJmPooA+wIwc4V62UoKgawIyExxOXVv+FP+sC4xs?= =?us-ascii?Q?p1hVv9FhEJHsdmdXtYWx87xEaQz8FRHs3ANZjvYCI8dd2mk/ua8hmr60QAb6?= =?us-ascii?Q?mmxT4a5LByQnJBOqUsgTwsp+U4weVwQMBzftD0BrdTJOxSLSvVHN7G1GW4X7?= =?us-ascii?Q?QHT8E4/7qKtir+QTWvJ4Sem06SZz4sZF+a3E8Kp5uo3ElETN1XQHjFHvRmki?= =?us-ascii?Q?y83yvubk5M3ERdEHJy82eCMlM+E8jeOYMrHeOX+yPkZQWCbMd6IGVZZrBaYh?= =?us-ascii?Q?CounZ1iJLwsbCyasAr24qc+zjsnxXxXWPXwM3ECuUvhToHXzVs71hQPER9m0?= =?us-ascii?Q?xUktYoC7ofgWTtsxG5WvzJl0pECfks/xWqLsQmIQ3VTq+Y7AzHBPg4dZ5gNg?= =?us-ascii?Q?Fkxwon1zXL850upNtPrT7GcC4Uj56UB3ux+yIrTpgN42HzJsH++yPyyYBzpU?= =?us-ascii?Q?5GymDWt1i7GEFp3m2GOyiPTbEtwkFuyv1y0dln4ZObiKGzVvUbisqoZ1b0q2?= =?us-ascii?Q?NDR6nnndDI+YfN0aGyQfSCLwN6if8rSAi1erM8sb8Grbr+S4xbImT9Tw8HQX?= =?us-ascii?Q?kCmWTWa/mrdVv9dNOh3i+n1uoT78QsiUAFRauQMTiM0OBuQ4h019c+hKH/Qn?= =?us-ascii?Q?dUOtCwR8nQwZHloA6D1C/6i/3akdSCZCBMJ/Y+pWMMauY8RVuRBdQp1wPf1j?= =?us-ascii?Q?cMe55rHJhH0fuOOBacvYvTfvpizyw1rSWY4v2UoVw4I9aTe+jOcgyuMaY7bW?= =?us-ascii?Q?E6CkTJxEwf3l2lSLpEkZzRu56nfwAPEbBq53H+zxizmbFibdvNbQjwn+29Lm?= =?us-ascii?Q?zpWEoc5oNlD6p/iyjlT+99nZiQx+3vlP4emysyTX+pq2s1veyZsTdk3egIA4?= =?us-ascii?Q?krkQyULhVAB7QVnCBQkVVXrBH5kykynVcYVeNMPaQZ31IVVH2nRNQf5HyaXB?= =?us-ascii?Q?ln5Q9fw7PfWkIriv1a5b2hcz1aMGIlttjmfIIhHGYTmSsj1lY4yfhmaqDH2Q?= =?us-ascii?Q?myzJ8ks9lIueKw6Gf27cBykNkSzE5NIrFHJv/ktdPZ5pKnTWXlVHZ3sBzPFk?= =?us-ascii?Q?jGmynuxcDXeqXy3rp9k=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(1800799024)(82310400026)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Sep 2025 21:13:41.3748 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 131a3b5e-0556-49fa-3df8-08ddfed3e67d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099D9.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN7PPFEE0F400A9 Hi, The following pull-request contains common mlx5 updates for your *net-next* tree. Please pull and let me know of any problem. Regards, Tariq ---------------------------------------------------------------- The following changes since commit a3d076b0567e729d5f21a95525c4d096b1f59e79: net/mlx5: Add uar access and odp page fault counters (2025-09-18 05:32:22 -0400) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux.git tags/mlx5-next-lag for you to fetch changes up to 137d1a6355131457723b51a34192320d93d15654: net/mlx5: IFC add balance ID and LAG per MP group bits (2025-09-28 03:36:36 -0400) ---------------------------------------------------------------- Mark Bloch (1): net/mlx5: IFC add balance ID and LAG per MP group bits Tariq Toukan (1): net/mlx5: Add IFC bit for TIR/SQ order capability include/linux/mlx5/mlx5_ifc.h | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-)