From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F20412264A3; Sun, 19 Oct 2025 07:09:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760857773; cv=none; b=kdhq9QOa/PuheV26GrKkeBrFNQpjS2ddilz0ifBQoXxFFeDEWbVJUVyZEjL+Xv6cuSroBDvKBR6H8WEVldfRQR9PMJ+Ns1r1oLjyLmKTGg2d2WuGH2PadeVpxcR8o51z/fkKHzNIOCq95ZduHguNh8XzVxw+ZCJE2lT7RG/AZAY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760857773; c=relaxed/simple; bh=1cvbg145GTR8EwyOshytryB72YZoENuA0QaLFuEP+eA=; h=From:To:Cc:In-Reply-To:References:Subject:Message-Id:Date: MIME-Version:Content-Type; b=SpLIy0zJlDkvs0smsq9GOJ/EjkiNY1yo2d3NLCrkbNZyxhyWVmJrDTMz9/3VPyuV+HG1j/nsZYa2UAqX6Vw3BBdKEqnkgO82BzIBH+ZVb4Q6OfXHDaZZCAMzwETWIK7H/xu5Bv3FZ5VF/sa/Acp99nAzybzv5Bk5lmF9R6ayXmI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Ie6YBXys; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Ie6YBXys" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 59D02C4CEE7; Sun, 19 Oct 2025 07:09:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1760857772; bh=1cvbg145GTR8EwyOshytryB72YZoENuA0QaLFuEP+eA=; h=From:To:Cc:In-Reply-To:References:Subject:Date:From; b=Ie6YBXys5ek/3dVw1jratTcMf/Im58/bJdqbGvhcsxZ127WhezF6AerTaa7gZoMXl qwHXxUQo87FogLaDJJdMYRX+X7hz2fKU7tIth5w50ckX5VS3TwSCnaxtT5o1iF5tVx F5Fymtml4MRudNadzb2ppUFpnFIfRrwCJ+A/v0+lbjc6f6+ZzZtP4uZ3o3kHtR9EyV D/yRcWdDqQvXU1nJ0oLuO1TM5BeQY2j3I+8AXlry3OORoZ1CLDSNwHSuvMvpoAxWy0 xu1zkc/IKSln+1TGocbyqmga4YlboOdNMY2lKqk3AriXE/FWusZQmQQPHL1VVsoukD x72s57jK5qH5A== From: Manivannan Sadhasivam To: thippeswamy.havalige@amd.com, Ravi Kumar Bandi Cc: lpieralisi@kernel.org, bhelgaas@google.com, linux-pci@vger.kernel.org, kwilczynski@kernel.org, robh@kernel.org, michal.simek@amd.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org In-Reply-To: <20250920225232.18757-1-ravib@amazon.com> References: <20250920225232.18757-1-ravib@amazon.com> Subject: Re: [PATCH v2] PCI: xilinx-xdma: Enable INTx interrupts Message-Id: <176085776570.12994.10687348823390647832.b4-ty@kernel.org> Date: Sun, 19 Oct 2025 12:39:25 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Mailer: b4 0.14.2 On Sat, 20 Sep 2025 22:52:32 +0000, Ravi Kumar Bandi wrote: > The pcie-xilinx-dma-pl driver does not enable INTx interrupts > after initializing the port, preventing INTx interrupts from > PCIe endpoints from flowing through the Xilinx XDMA root port > bridge. This issue affects kernel 6.6.0 and later versions. > > This patch allows INTx interrupts generated by PCIe endpoints > to flow through the root port. Tested the fix on a board with > two endpoints generating INTx interrupts. Interrupts are > properly detected and serviced. The /proc/interrupts output > shows: > > [...] Applied, thanks! [1/1] PCI: xilinx-xdma: Enable INTx interrupts commit: c098c13f4365e6750009be4d90dba36fa4a19b4e Best regards, -- Manivannan Sadhasivam