From: "Rob Herring (Arm)" <robh@kernel.org>
To: Conor Dooley <conor@kernel.org>
Cc: Valentina.FernandezAlanis@microchip.com,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
linus.walleij@linaro.org,
Conor Dooley <conor.dooley@microchip.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-gpio@vger.kernel.org
Subject: Re: [PATCH v2 3/5] dt-bindings: pinctrl: document polarfire soc iomux0 pinmux
Date: Mon, 20 Oct 2025 16:01:51 -0500 [thread overview]
Message-ID: <176099411059.1819853.2443262969720536579.robh@kernel.org> (raw)
In-Reply-To: <20251014-ravioli-ramrod-84b478186bb7@spud>
On Tue, 14 Oct 2025 15:35:36 +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> On Polarfire SoC, iomux0 is responsible for routing functions to either
> Multiprocessor Subsystem (MSS) IOs or to the FPGA fabric, where they
> can either interface with custom RTL or be routed to the FPGA fabric's
> IOs. Document it.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> .../microchip,mpfs-pinctrl-iomux0.yaml | 88 +++++++++++++++++++
> .../microchip,mpfs-mss-top-sysreg.yaml | 13 ++-
> 2 files changed, 100 insertions(+), 1 deletion(-)
> create mode 100644 Documentation/devicetree/bindings/pinctrl/microchip,mpfs-pinctrl-iomux0.yaml
>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
next prev parent reply other threads:[~2025-10-20 21:01 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-14 14:35 [PATCH v2 0/5] Microchip mpfs/pic64gx pinctrl Conor Dooley
2025-10-14 14:35 ` [PATCH v2 1/5] dt-bindings: pinctrl: document pic64gx "gpio2" pinmux Conor Dooley
2025-10-20 21:01 ` Rob Herring (Arm)
2025-10-14 14:35 ` [PATCH v2 2/5] pinctrl: add pic64gx "gpio2" pinmux driver Conor Dooley
2025-10-14 14:35 ` [PATCH v2 3/5] dt-bindings: pinctrl: document polarfire soc iomux0 pinmux Conor Dooley
2025-10-20 21:01 ` Rob Herring (Arm) [this message]
2025-10-14 14:35 ` [PATCH v2 4/5] pinctrl: add polarfire soc iomux0 pinmux driver Conor Dooley
2025-10-14 14:53 ` Conor Dooley
2025-10-14 14:35 ` [PATCH v2 5/5] MAINTAINERS: add Microchip RISC-V pinctrl drivers/bindings to entry Conor Dooley
2025-10-20 21:05 ` [PATCH v2 0/5] Microchip mpfs/pic64gx pinctrl Linus Walleij
2025-10-21 9:47 ` Conor Dooley
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