From: Manivannan Sadhasivam <mani@kernel.org>
To: "Vinod Koul" <vkoul@kernel.org>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Bjorn Andersson" <andersson@kernel.org>,
"Qiang Yu" <qiang.yu@oss.qualcomm.com>
Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org,
Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>,
Wenbin Yao <wenbin.yao@oss.qualcomm.com>,
Qiang Yu <quic_qianyu@quicinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Subject: Re: (subset) [PATCH v5 0/6] PCI: qcom: Add support for Glymur PCIe Gen5 x4 and Gen4 x2
Date: Fri, 31 Oct 2025 13:50:41 +0530 [thread overview]
Message-ID: <176189884156.5303.14323602106505981794.b4-ty@kernel.org> (raw)
In-Reply-To: <20251017-glymur_pcie-v5-0-82d0c4bd402b@oss.qualcomm.com>
On Fri, 17 Oct 2025 18:33:37 -0700, Qiang Yu wrote:
> Glymur is the next generation compute SoC of Qualcomm. This patch series
> aims to add support for the fourth, fifth and sixth PCIe instance on it.
> The fifth PCIe instance on Glymur has a Gen5 4-lane PHY and fourth, fifth
> and sixth PCIe instance have a Gen5 2-lane PHY.
>
> The device tree changes and whatever driver patches that are not part of
> this patch series will be posted separately after official announcement of
> the SOC.
>
> [...]
Applied, thanks!
[3/6] dt-bindings: PCI: qcom: Document the Glymur PCIe Controller
commit: f0b5af98e1b5761095d5186d3a7af5a0991a5cd9
Best regards,
--
Manivannan Sadhasivam <mani@kernel.org>
prev parent reply other threads:[~2025-10-31 8:20 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-18 1:33 Qiang Yu
2025-10-18 1:33 ` [PATCH v5 1/6] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the Glymur QMP PCIe PHY Qiang Yu
2025-10-18 1:33 ` [PATCH v5 2/6] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the Glymur QMP PCIe Gen4 2-lane PHY Qiang Yu
2025-10-19 9:07 ` Krzysztof Kozlowski
2025-10-21 7:04 ` Krzysztof Kozlowski
2025-10-22 9:05 ` Qiang Yu
2025-10-18 1:33 ` [PATCH v5 3/6] dt-bindings: PCI: qcom: Document the Glymur PCIe Controller Qiang Yu
2025-10-18 1:33 ` [PATCH v5 4/6] phy: qcom-qmp: pcs: Add v8.50 register offsets Qiang Yu
2025-10-18 1:33 ` [PATCH v5 5/6] phy: qcom: qmp-pcie: Add support for Glymur PCIe Gen5x4 PHY Qiang Yu
2025-10-18 1:33 ` [PATCH v5 6/6] phy: qcom: qmp-pcie: Add support for glymur PCIe Gen4 x2 PHY Qiang Yu
2025-10-22 8:53 ` Abel Vesa
2025-10-22 9:01 ` Qiang Yu
2025-10-31 8:20 ` Manivannan Sadhasivam [this message]
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