From: "tip-bot2 for Junhui Liu" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Junhui Liu <junhui.liu@pigmoral.tech>,
Thomas Gleixner <tglx@linutronix.de>,
"Rob Herring (Arm)" <robh@kernel.org>,
x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: irq/drivers] dt-bindings: interrupt-controller: Add Anlogic DR1V90 ACLINT MSWI
Date: Tue, 11 Nov 2025 21:23:15 -0000 [thread overview]
Message-ID: <176289619547.498.16836127845328612168.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20251021-dr1v90-basic-dt-v3-5-5478db4f664a@pigmoral.tech>
The following commit has been merged into the irq/drivers branch of tip:
Commit-ID: 579951da64253e9592d21e54b1535e0119df78ab
Gitweb: https://git.kernel.org/tip/579951da64253e9592d21e54b1535e0119df78ab
Author: Junhui Liu <junhui.liu@pigmoral.tech>
AuthorDate: Tue, 21 Oct 2025 17:41:40 +08:00
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Tue, 11 Nov 2025 22:17:21 +01:00
dt-bindings: interrupt-controller: Add Anlogic DR1V90 ACLINT MSWI
Add MSWI support for Anlogic DR1V90 SoC, which uses Nuclei UX900 with a
TIMER unit compliant with the ACLINT specification.
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20251021-dr1v90-basic-dt-v3-5-5478db4f664a@pigmoral.tech
---
Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-mswi.yaml | 17 +++++++++++------
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-mswi.yaml b/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-mswi.yaml
index d6fb08a..62fd220 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-mswi.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-mswi.yaml
@@ -4,18 +4,23 @@
$id: http://devicetree.org/schemas/interrupt-controller/thead,c900-aclint-mswi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Sophgo sg2042 CLINT Machine-level Software Interrupt Device
+title: ACLINT Machine-level Software Interrupt Device
maintainers:
- Inochi Amaoto <inochiama@outlook.com>
properties:
compatible:
- items:
- - enum:
- - sophgo,sg2042-aclint-mswi
- - sophgo,sg2044-aclint-mswi
- - const: thead,c900-aclint-mswi
+ oneOf:
+ - items:
+ - enum:
+ - sophgo,sg2042-aclint-mswi
+ - sophgo,sg2044-aclint-mswi
+ - const: thead,c900-aclint-mswi
+ - items:
+ - enum:
+ - anlogic,dr1v90-aclint-mswi
+ - const: nuclei,ux900-aclint-mswi
reg:
maxItems: 1
next prev parent reply other threads:[~2025-11-11 21:23 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-21 9:41 [PATCH v3 00/13] riscv: Add initial support for Anlogic DR1V90 Junhui Liu
2025-10-21 9:41 ` [PATCH v3 01/13] dt-bindings: vendor-prefixes: Add Anlogic, Milianke and Nuclei Junhui Liu
2025-10-21 9:41 ` [PATCH v3 02/13] dt-bindings: riscv: Add Nuclei UX900 compatibles Junhui Liu
2025-10-21 9:41 ` [PATCH v3 03/13] dt-bindings: riscv: Add Anlogic DR1V90 Junhui Liu
2025-10-21 9:41 ` [PATCH v3 04/13] dt-bindings: interrupt-controller: Add Anlogic DR1V90 PLIC Junhui Liu
2025-11-11 21:23 ` [tip: irq/drivers] " tip-bot2 for Junhui Liu
2025-10-21 9:41 ` [PATCH v3 05/13] dt-bindings: interrupt-controller: Add Anlogic DR1V90 ACLINT MSWI Junhui Liu
2025-10-26 21:40 ` Rob Herring (Arm)
2025-11-11 21:23 ` tip-bot2 for Junhui Liu [this message]
2025-10-21 9:41 ` [PATCH v3 06/13] dt-bindings: interrupt-controller: Add Anlogic DR1V90 ACLINT SSWI Junhui Liu
2025-10-26 21:42 ` Rob Herring (Arm)
2025-11-11 21:23 ` [tip: irq/drivers] " tip-bot2 for Junhui Liu
2025-10-21 9:41 ` [PATCH v3 07/13] dt-bindings: timer: Add Anlogic DR1V90 ACLINT MTIMER Junhui Liu
2025-10-26 21:43 ` Rob Herring (Arm)
2025-10-21 9:41 ` [PATCH v3 08/13] dt-bindings: serial: snps-dw-apb-uart: Add Anlogic DR1V90 uart Junhui Liu
2025-10-21 9:41 ` [PATCH v3 09/13] irqchip/aclint-sswi: Add Nuclei UX900 support Junhui Liu
2025-11-11 21:23 ` [tip: irq/drivers] " tip-bot2 for Junhui Liu
2025-10-21 9:41 ` [PATCH v3 10/13] riscv: Add Anlogic SoC famly Kconfig support Junhui Liu
2025-10-21 9:41 ` [PATCH v3 11/13] riscv: dts: Add initial Anlogic DR1V90 SoC device tree Junhui Liu
2025-10-21 9:41 ` [PATCH v3 12/13] riscv: dts: anlogic: Add Milianke MLKPAI FS01 board Junhui Liu
2025-10-21 9:41 ` [PATCH v3 13/13] riscv: defconfig: Enable Anlogic SoC Junhui Liu
2025-10-28 19:39 ` [PATCH v3 00/13] riscv: Add initial support for Anlogic DR1V90 Conor Dooley
2025-11-06 17:10 ` Conor Dooley
2025-11-12 17:17 ` Conor Dooley
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