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From: "tip-bot2 for Xianwei Zhao" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Xianwei Zhao <xianwei.zhao@amlogic.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: irq/drivers] irqchip/meson-gpio: Add support for Amlogic S6 S7 and S7D SoCs
Date: Thu, 13 Nov 2025 13:07:36 -0000	[thread overview]
Message-ID: <176303925686.498.4721975670456734726.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20251105-irqchip-gpio-s6-s7-s7d-v1-2-b4d1fe4781c1@amlogic.com>

The following commit has been merged into the irq/drivers branch of tip:

Commit-ID:     fc584d871c1641949594ccf12a48bb226636b189
Gitweb:        https://git.kernel.org/tip/fc584d871c1641949594ccf12a48bb226636b189
Author:        Xianwei Zhao <xianwei.zhao@amlogic.com>
AuthorDate:    Wed, 05 Nov 2025 17:45:33 +08:00
Committer:     Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Thu, 13 Nov 2025 14:04:16 +01:00

irqchip/meson-gpio: Add support for Amlogic S6 S7 and S7D SoCs

The Amlogic S6/S7/S7D SoCs support GPIO interrupt lines:

    S6 IRQ Number:
    - 99:98    2 pins on bank CC
    - 97       1 pin  on bank TESTN
    - 96:81   16 pins on bank A
    - 80:65   16 pins on bank Z
    - 64:45   20 pins on bank X
    - 44:37    8 pins on bank H offs H1
    - 36:32    5 pins on bank F
    - 31:25    7 pins on bank D
    - 24:22    3 pins on bank E
    - 21:14    8 pins on bank C
    - 13:0    14 pins on bank B

    S7 IRQ Number:
    - 83:82    2 pins on bank CC
    - 81       1 pin  on bank TESTN
    - 80:68   13 pins on bank Z
    - 67:48   20 pins on bank X
    - 47:36   12 pins on bank H
    - 35:24   12 pins on bank D
    - 23:22    2 pins on bank E
    - 21:14    8 pins on bank C
    - 13:0    14 pins on bank B

    S7D IRQ Number:
    - 83:82    2 pins on bank CC
    - 81:75    7 pins on bank DV
    - 74       1 pin  on bank TESTN
    - 73:61   13 pins on bank Z
    - 60:41   20 pins on bank X
    - 40:29   12 pins on bank H
    - 28:24    5 pins on bank D
    - 23:22    2 pins on bank E
    - 21:14    8 pins on bank C
    - 13:0    14 pins on bank B

Add the required compatibles and interrupt count initializers.

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20251105-irqchip-gpio-s6-s7-s7d-v1-2-b4d1fe4781c1@amlogic.com
---
 drivers/irqchip/irq-meson-gpio.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/irqchip/irq-meson-gpio.c b/drivers/irqchip/irq-meson-gpio.c
index 6c5e2ff..3fcbb04 100644
--- a/drivers/irqchip/irq-meson-gpio.c
+++ b/drivers/irqchip/irq-meson-gpio.c
@@ -174,6 +174,14 @@ static const struct meson_gpio_irq_params s4_params = {
 	INIT_MESON_S4_COMMON_DATA(82)
 };
 
+static const struct meson_gpio_irq_params s6_params = {
+	INIT_MESON_S4_COMMON_DATA(100)
+};
+
+static const struct meson_gpio_irq_params s7_params = {
+	INIT_MESON_S4_COMMON_DATA(84)
+};
+
 static const struct meson_gpio_irq_params c3_params = {
 	INIT_MESON_S4_COMMON_DATA(55)
 };
@@ -195,6 +203,9 @@ static const struct of_device_id meson_irq_gpio_matches[] __maybe_unused = {
 	{ .compatible = "amlogic,a4-gpio-ao-intc", .data = &a4_ao_params },
 	{ .compatible = "amlogic,a4-gpio-intc", .data = &a4_params },
 	{ .compatible = "amlogic,a5-gpio-intc", .data = &a5_params },
+	{ .compatible = "amlogic,s6-gpio-intc", .data = &s6_params },
+	{ .compatible = "amlogic,s7-gpio-intc", .data = &s7_params },
+	{ .compatible = "amlogic,s7d-gpio-intc", .data = &s7_params },
 	{ .compatible = "amlogic,c3-gpio-intc", .data = &c3_params },
 	{ .compatible = "amlogic,t7-gpio-intc", .data = &t7_params },
 	{ }

  parent reply	other threads:[~2025-11-13 13:07 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-05  9:45 [PATCH 0/5] Add GPIO interrupt support for Amlogic S6 S7 and S7D Xianwei Zhao via B4 Relay
2025-11-05  9:45 ` [PATCH 1/5] dt-bindings: interrupt-controller: Add support for Amlogic S6 S7 and S7D SoCs Xianwei Zhao via B4 Relay
2025-11-06  9:00   ` Krzysztof Kozlowski
2025-11-13 13:07   ` [tip: irq/drivers] " tip-bot2 for Xianwei Zhao
2025-11-05  9:45 ` [PATCH 2/5] irqchip: " Xianwei Zhao via B4 Relay
2025-11-06 13:07   ` Neil Armstrong
2025-11-13 13:07   ` tip-bot2 for Xianwei Zhao [this message]
2025-11-05  9:45 ` [PATCH 3/5] arm64: dts: Add gpio_intc node for Amlogic S6 SoCs Xianwei Zhao via B4 Relay
2025-11-06 13:07   ` Neil Armstrong
2025-11-13 13:07   ` [tip: irq/drivers] arm64: dts: amlogic: " tip-bot2 for Xianwei Zhao
2025-11-05  9:45 ` [PATCH 4/5] arm64: dts: Add gpio_intc node for Amlogic S7 SoCs Xianwei Zhao via B4 Relay
2025-11-06 13:08   ` Neil Armstrong
2025-11-13 13:07   ` [tip: irq/drivers] arm64: dts: amlogic: " tip-bot2 for Xianwei Zhao
2025-11-05  9:45 ` [PATCH 5/5] arm64: dts: Add gpio_intc node for Amlogic S7D SoCs Xianwei Zhao via B4 Relay
2025-11-06 13:08   ` Neil Armstrong
2025-11-13 13:07   ` [tip: irq/drivers] arm64: dts: amlogic: " tip-bot2 for Xianwei Zhao
2025-11-14 15:58   ` [PATCH 5/5] arm64: dts: " Rob Herring (Arm)
2025-11-14 16:11     ` Thomas Gleixner
2025-11-14 18:41       ` Rob Herring
2025-11-20  7:54 ` [PATCH 0/5] Add GPIO interrupt support for Amlogic S6 S7 and S7D Neil Armstrong
2025-11-20 10:50   ` Thomas Gleixner
2025-11-20 14:22 ` (subset) " Neil Armstrong

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