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Fri, 21 Nov 2025 03:43:20 GMT Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3348F201D3; Fri, 21 Nov 2025 02:54:19 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D4709201D0; Fri, 21 Nov 2025 02:54:17 +0000 (GMT) Received: from li-c439904c-24ed-11b2-a85c-b284a6847472.in.ibm.com (unknown [9.98.111.108]) by smtpav04.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 21 Nov 2025 02:54:17 +0000 (GMT) From: Madhavan Srinivasan To: Michael Ellerman , Nicholas Piggin , Christophe Leroy Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Subject: Re: [PATCH v2] powerpc/32: Restore clearing of MSR[RI] at interrupt/syscall exit Date: Fri, 21 Nov 2025 08:23:45 +0530 Message-ID: <176369324782.72695.4834349626234011724.b4-ty@linux.ibm.com> X-Mailer: git-send-email 2.51.1 In-Reply-To: <66d0ab070563ad460ed481328ab0887c27f21a2c.1757593807.git.christophe.leroy@csgroup.eu> References: <66d0ab070563ad460ed481328ab0887c27f21a2c.1757593807.git.christophe.leroy@csgroup.eu> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 0zaixKCk5kLvyWz8JHX2XdcqPBoDWt1y X-Proofpoint-ORIG-GUID: op8JCAz_TQV2MshMvtsqCLtK9lh8T2GY X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTE1MDAzMiBTYWx0ZWRfX2PKHVSjBvNBW nfahp2ksZS7Nw+NnqwMkGQNMmP3gDkD8d/q2cibo12Fi/WpBtKFeofDxNf44KNiLkrD8nwjCciR 2edUVz5Urt+xMGF75vapucqmgGDhxL99ICmmSl57sKqNT/lg1ymCqf9fE8GqoJv32yIsNrjcco4 HNaCaFJDIJAoM1I3wLfZ/xCl+tP3+mVIrn/k5s4TJKOajnWh6abaIW65IBWMig+Gndfw/fteGAm VCiPSObAsESHXGsru+hQg7Fd+F7jF2m/6iOq95TSPuuwEJ2XevwYTt4b+Uaa1I1Rh1sFxmjXjbQ hlrPyXWaDHaCcX9Ao6V6ywJeDAbDLnCIl3yHRiBzBIhhiKS1AQiYZMKbQP4Ejg46/3r8u7jwyfW gg1wlro7irCBsFYZg9c+gaKHXxEecw== X-Authority-Analysis: v=2.4 cv=SvOdKfO0 c=1 sm=1 tr=0 ts=691fdfdc cx=c_pps a=bLidbwmWQ0KltjZqbj+ezA==:117 a=bLidbwmWQ0KltjZqbj+ezA==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VwQbUJbxAAAA:8 a=zBquk3hgwFuBcaCGxhoA:9 a=QEXdDO2ut3YA:10 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-21_01,2025-11-20_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 spamscore=0 clxscore=1015 suspectscore=0 phishscore=0 adultscore=0 bulkscore=0 impostorscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510240000 definitions=main-2511150032 On Thu, 11 Sep 2025 14:30:12 +0200, Christophe Leroy wrote: > Commit 13799748b957 ("powerpc/64: use interrupt restart table to speed > up return from interrupt") removed the inconditional clearing of > MSR[RI] when returning from interrupt into kernel. But powerpc/32 > doesn't implement interrupt restart table hence still need MSR[RI] > to be cleared. > > It could be added back in interrupt_exit_kernel_prepare() but it is > easier and better to add it back in entry_32.S for following reasons: > - Writing to MSR must be followed by a synchronising instruction > - The smaller the non recoverable section is the better it is > > [...] Applied to powerpc/next. [1/1] powerpc/32: Restore clearing of MSR[RI] at interrupt/syscall exit https://git.kernel.org/powerpc/c/2997876c4a1a5864baa13d7393c2b68cf5b51183 Thanks