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Mon, 24 Nov 2025 21:36:35 -0800 (PST) Received: from [192.168.1.2] ([2401:4900:88e8:55c:808f:7bd5:9774:52e7]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3475ea6d780sm452943a91.6.2025.11.24.21.36.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Nov 2025 21:36:35 -0800 (PST) From: Manivannan Sadhasivam X-Google-Original-From: Manivannan Sadhasivam To: chester62515@gmail.com, mbrugger@suse.com, ghennadi.procopciuc@oss.nxp.com, s32@nxp.com, bhelgaas@google.com, jingoohan1@gmail.com, lpieralisi@kernel.org, kwilczynski@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, Ionut.Vicovan@nxp.com, larisa.grigore@nxp.com, Ghennadi.Procopciuc@nxp.com, ciprianmarian.costea@nxp.com, bogdan.hamciuc@nxp.com, Frank.li@nxp.com, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, Vincent Guittot Cc: cassel@kernel.org In-Reply-To: <20251121164920.2008569-1-vincent.guittot@linaro.org> References: <20251121164920.2008569-1-vincent.guittot@linaro.org> Subject: Re: [PATCH 0/4 v6] PCI: s32g: Add support for PCIe controller Message-Id: <176404898659.18373.12076537585341452677.b4-ty@kernel.org> Date: Tue, 25 Nov 2025 11:06:26 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; 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[1/4] dt-bindings: PCI: s32g: Add NXP PCIe controller commit: dd17ec3df57b7bd0d23f3a17124d59b2740d81e4 [2/4] PCI: dw: Add more registers and bitfield definition commit: bd1be33651b21ce15eee8fa2f080109e3eaa8e29 [3/4] PCI: s32g: Add initial PCIe support (RC) commit: c403d6d7282b72fe1a0812c99beeeefb1a7e1f4b [4/4] MAINTAINERS: Add MAINTAINER for NXP S32G PCIe driver commit: 58fc675c34c583771d412aa89fb364c750fadacf Best regards, -- Manivannan Sadhasivam