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Wed, 17 Dec 2025 23:35:52 -0800 (PST) Received: from [192.168.1.102] ([117.193.213.102]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-34e70dbc9d6sm1583665a91.10.2025.12.17.23.35.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Dec 2025 23:35:52 -0800 (PST) From: Manivannan Sadhasivam X-Google-Original-From: Manivannan Sadhasivam To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Jingoo Han , Qiang Yu Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Wenbin Yao In-Reply-To: <20251109-remove_cap-v1-0-2208f46f4dc2@oss.qualcomm.com> References: <20251109-remove_cap-v1-0-2208f46f4dc2@oss.qualcomm.com> Subject: Re: [PATCH 0/5] PCI: Remove unsupported or incomplete PCIe Capabilities Message-Id: <176604334948.837916.5544634528057993616.b4-ty@kernel.org> Date: Thu, 18 Dec 2025 13:05:49 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Mailer: b4 0.14.3 X-Proofpoint-GUID: PDg4Gt2w-e_ayCN-KTOPecAnHlX2or3m X-Authority-Analysis: v=2.4 cv=Z8Th3XRA c=1 sm=1 tr=0 ts=6943aed9 cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=PLOdWElDzbaVVj/XHNhp9A==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VwQbUJbxAAAA:8 a=15xY4BtIdfvhjXbsFDsA:9 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 X-Proofpoint-ORIG-GUID: PDg4Gt2w-e_ayCN-KTOPecAnHlX2or3m X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjE4MDA2MSBTYWx0ZWRfX94BWpQ0PI5YL SBxLIs2RlTQ+IPygLQ1sAUGDsPRZl8YMLb4hjxtB+QhFtRo3s3VdFgJVIOeKPn1y1Zvw9/PrYBW SpCmGm3rLr6hr9ACopKd7xZJNQyyGYi+ldzpcrlz50Gon+lV3angqETQ3DHKNw77oDMKQDsQDYI rDQ0pM1/kikKU3Be7n9tRn/27Tx0LJbBsBIK1kR5lOiAl95twIHyCG0vSm8miP+lirPclwPWnCt XIAaqvYJrcqYUS1ftvwgcMQKDhlsHKuFBMaS9ci3WLIcKHBcPY3aTC1PJ+9W3/4F3t9T1whR1ml Svl4PJnVbYPWuRoCb3/K3hUfGCDdLi4bddz0qy0kGm/q+LSeCBaW0GswFDlA1RbbMcJZSKLHS8r +wHzPFTobQay9qSYL2kKDGbfAHyjuQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-18_01,2025-12-17_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 bulkscore=0 malwarescore=0 suspectscore=0 impostorscore=0 lowpriorityscore=0 clxscore=1015 phishscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2512180061 On Sun, 09 Nov 2025 22:59:39 -0800, Qiang Yu wrote: > This patch series addresses issues where certain PCIe Standard or Extended > Capabilities are advertised by the controller, but not fully or at all > implemented in hardware. Exposing such capabilities to the PCI framework > can lead to unexpected or undefined behavior. > > The series consists of two main parts: > > [...] Applied, thanks! [1/5] PCI: Add preceding capability position support and update drivers commit: a2582e05e39adf9ab82a02561cd6f70738540ae0 [2/5] PCI: dwc: Add new APIs to remove standard and extended Capability commit: 0183562f1e824c0ca6c918309a0978e9a269af3e [3/5] PCI: dwc: Remove MSI/MSIX capability if iMSI-RX is used as MSI controller commit: f5cd8a929c825ad4df3972df041ad62ad84ca6c9 [4/5] PCI: qcom: Remove MSI-X Capability for Root Ports commit: 7c29cd0fdc07e5e21202fdeed0b63cba2b4f10c6 [5/5] PCI: qcom: Remove DPC Extended Capability commit: 6a1394990902f0393706d7f96f58c21d88b65df7 Best regards, -- Manivannan Sadhasivam