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From: "tip-bot2 for Dapeng Mi" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Dapeng Mi <dapeng1.mi@linux.intel.com>,
	"Peter Zijlstra (Intel)" <peterz@infradead.org>,
	x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: perf/core] perf/x86: Use macros to replace magic numbers in attr_rdpmc
Date: Thu, 15 Jan 2026 21:44:02 -0000	[thread overview]
Message-ID: <176851344224.510.2809933077348414459.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20260114011750.350569-7-dapeng1.mi@linux.intel.com>

The following commit has been merged into the perf/core branch of tip:

Commit-ID:     8c74e4e3e0596950554962229582260f1501d899
Gitweb:        https://git.kernel.org/tip/8c74e4e3e0596950554962229582260f1501d899
Author:        Dapeng Mi <dapeng1.mi@linux.intel.com>
AuthorDate:    Wed, 14 Jan 2026 09:17:49 +08:00
Committer:     Peter Zijlstra <peterz@infradead.org>
CommitterDate: Thu, 15 Jan 2026 10:04:27 +01:00

perf/x86: Use macros to replace magic numbers in attr_rdpmc

Replace magic numbers in attr_rdpmc with macros to improve readability
and make their meanings clearer for users.

Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://patch.msgid.link/20260114011750.350569-7-dapeng1.mi@linux.intel.com
---
 arch/x86/events/core.c       | 7 ++++---
 arch/x86/events/intel/p6.c   | 2 +-
 arch/x86/events/perf_event.h | 7 +++++++
 3 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index 0ecac94..c2717cb 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -2163,7 +2163,8 @@ static int __init init_hw_perf_events(void)
 
 	pr_cont("%s PMU driver.\n", x86_pmu.name);
 
-	x86_pmu.attr_rdpmc = 1; /* enable userspace RDPMC usage by default */
+	/* enable userspace RDPMC usage by default */
+	x86_pmu.attr_rdpmc = X86_USER_RDPMC_CONDITIONAL_ENABLE;
 
 	for (quirk = x86_pmu.quirks; quirk; quirk = quirk->next)
 		quirk->func();
@@ -2643,12 +2644,12 @@ static ssize_t set_attr_rdpmc(struct device *cdev,
 		 */
 		if (val == 0)
 			static_branch_inc(&rdpmc_never_available_key);
-		else if (x86_pmu.attr_rdpmc == 0)
+		else if (x86_pmu.attr_rdpmc == X86_USER_RDPMC_NEVER_ENABLE)
 			static_branch_dec(&rdpmc_never_available_key);
 
 		if (val == 2)
 			static_branch_inc(&rdpmc_always_available_key);
-		else if (x86_pmu.attr_rdpmc == 2)
+		else if (x86_pmu.attr_rdpmc == X86_USER_RDPMC_ALWAYS_ENABLE)
 			static_branch_dec(&rdpmc_always_available_key);
 
 		on_each_cpu(cr4_update_pce, NULL, 1);
diff --git a/arch/x86/events/intel/p6.c b/arch/x86/events/intel/p6.c
index 6e41de3..fb991e0 100644
--- a/arch/x86/events/intel/p6.c
+++ b/arch/x86/events/intel/p6.c
@@ -243,7 +243,7 @@ static __init void p6_pmu_rdpmc_quirk(void)
 		 */
 		pr_warn("Userspace RDPMC support disabled due to a CPU erratum\n");
 		x86_pmu.attr_rdpmc_broken = 1;
-		x86_pmu.attr_rdpmc = 0;
+		x86_pmu.attr_rdpmc = X86_USER_RDPMC_NEVER_ENABLE;
 	}
 }
 
diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
index f7caabc..24a81d2 100644
--- a/arch/x86/events/perf_event.h
+++ b/arch/x86/events/perf_event.h
@@ -187,6 +187,13 @@ struct amd_nb {
 	 (1ULL << PERF_REG_X86_R14)   | \
 	 (1ULL << PERF_REG_X86_R15))
 
+/* user space rdpmc control values */
+enum {
+	X86_USER_RDPMC_NEVER_ENABLE		= 0,
+	X86_USER_RDPMC_CONDITIONAL_ENABLE	= 1,
+	X86_USER_RDPMC_ALWAYS_ENABLE		= 2,
+};
+
 /*
  * Per register state.
  */

  reply	other threads:[~2026-01-15 21:44 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-14  1:17 [Patch v3 0/7] Enable core PMU for DMR and NVL Dapeng Mi
2026-01-14  1:17 ` [Patch v3 1/7] perf/x86/intel: Support the 4 new OMR MSRs introduced in " Dapeng Mi
2026-01-15 21:44   ` [tip: perf/core] " tip-bot2 for Dapeng Mi
2026-01-14  1:17 ` [Patch v3 2/7] perf/x86/intel: Add support for PEBS memory auxiliary info field in DMR Dapeng Mi
2026-01-15 21:44   ` [tip: perf/core] " tip-bot2 for Dapeng Mi
2026-03-09 23:47     ` Ian Rogers
2026-03-10  3:32       ` Mi, Dapeng
2026-03-10  4:38         ` Ian Rogers
2026-03-10  5:04           ` Mi, Dapeng
2026-01-14  1:17 ` [Patch v3 3/7] perf/x86/intel: Add core PMU support for DMR Dapeng Mi
2026-01-15 21:44   ` [tip: perf/core] " tip-bot2 for Dapeng Mi
2026-01-14  1:17 ` [Patch v3 4/7] perf/x86/intel: Add support for PEBS memory auxiliary info field in NVL Dapeng Mi
2026-01-15 21:44   ` [tip: perf/core] " tip-bot2 for Dapeng Mi
2026-01-14  1:17 ` [Patch v3 5/7] perf/x86/intel: Add core PMU support for Novalake Dapeng Mi
2026-01-15 21:44   ` [tip: perf/core] " tip-bot2 for Dapeng Mi
2026-01-14  1:17 ` [Patch v3 6/7] perf/x86: Use macros to replace magic numbers in attr_rdpmc Dapeng Mi
2026-01-15 21:44   ` tip-bot2 for Dapeng Mi [this message]
2026-03-09 23:56   ` Ian Rogers
2026-03-10  3:14     ` Mi, Dapeng
2026-01-14  1:17 ` [Patch v3 7/7] perf/x86/intel: Add support for rdpmc user disable feature Dapeng Mi
2026-01-15 21:44   ` [tip: perf/core] " tip-bot2 for Dapeng Mi

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