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Mon, 19 Jan 2026 17:16:25 -0800 (PST) From: Inochi Amaoto To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Conor Dooley , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Chen Wang , Yixun Lan , Conor Dooley , Guodong Xu Cc: Inochi Amaoto , Junhui Liu , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, sophgo@lists.linux.dev, spacemit@lists.linux.dev Subject: Re: (subset) [PATCH v2 0/4] riscv: dts: Add "b" ISA extension to existing devicetrees Date: Tue, 20 Jan 2026 09:16:14 +0800 Message-ID: <176887176536.427065.4468747981087466363.b4-ty@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260115-adding-b-dtsi-v2-0-254dd61cf947@riscstar.com> References: <20260115-adding-b-dtsi-v2-0-254dd61cf947@riscstar.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit On Thu, 15 Jan 2026 07:18:56 +0800, Guodong Xu wrote: > The RISC-V "b" (Bit-manipulation) extension was ratified in April 2024, > much later than its component extensions zba/zbb/zbs (June 2021). Recent > updates to the device tree bindings [2] enforce that when all three > component extensions are present, "b" must also be specified. Related > discussion can also be found in [1]. > > Patch 1 clarifies the ISA spec version for canonical ordering in uabi.rst. > It is a trivial update, but can help readers reference the correct > document version. Acked-by Paul Walmsley in v1. > > [...] Applied to dt/riscv, thanks! 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Mon, 19 Jan 2026 18:49:13 -0800 (PST) From: Inochi Amaoto To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Conor Dooley , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Chen Wang , Yixun Lan , Conor Dooley , Guodong Xu Cc: Inochi Amaoto , Junhui Liu , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, sophgo@lists.linux.dev, spacemit@lists.linux.dev Subject: Re: (subset) [PATCH v2 0/4] riscv: dts: Add "b" ISA extension to existing devicetrees Date: Tue, 20 Jan 2026 10:48:55 +0800 Message-ID: <176887176536.427065.4468747981087466363.b4-ty@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260115-adding-b-dtsi-v2-0-254dd61cf947@riscstar.com> References: <20260115-adding-b-dtsi-v2-0-254dd61cf947@riscstar.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-ID: <20260120024855.iCWV6cvL2IFzEcYXsT6n52e0tE9dl_zwPeC3aHQO5-M@z> On Thu, 15 Jan 2026 07:18:56 +0800, Guodong Xu wrote: > The RISC-V "b" (Bit-manipulation) extension was ratified in April 2024, > much later than its component extensions zba/zbb/zbs (June 2021). Recent > updates to the device tree bindings [2] enforce that when all three > component extensions are present, "b" must also be specified. Related > discussion can also be found in [1]. > > Patch 1 clarifies the ISA spec version for canonical ordering in uabi.rst. > It is a trivial update, but can help readers reference the correct > document version. Acked-by Paul Walmsley in v1. > > [...] Applied to dt/riscv, thanks! [3/4] riscv: dts: sophgo: sg2044: Add "b" ISA extension https://github.com/sophgo/linux/commit/f16ae81b80ca4e721f4c4ed1f28390115f7721eb Thanks, Inochi