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From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
To: linux-kernel@vger.kernel.org, Randolph <randolph@andestech.com>
Cc: linux-pci@vger.kernel.org, bhelgaas@google.com, robh@kernel.org,
	kwilczynski@kernel.org, lpieralisi@kernel.org,
	jingoohan1@gmail.com, samuel.holland@sifive.com,
	Frank.Li@nxp.com, cmirabil@redhat.com, randolph.sklin@gmail.com,
	tim609@andestech.com
Subject: Re: [PATCH v2] PCI: dwc: Use multiple ATU regions for large bridge windows
Date: Thu, 22 Jan 2026 15:06:06 +0530	[thread overview]
Message-ID: <176907456657.75296.14064668565506074059.b4-ty@kernel.org> (raw)
In-Reply-To: <20260109113430.2767264-1-randolph@andestech.com>


On Fri, 09 Jan 2026 19:34:30 +0800, Randolph wrote:
> Some SoCs may allocate more address space for a bridge window than can
> be covered by a single ATU region. Allow using a larger bridge window
> by allocating multiple adjacent ATU regions.
> 
> 

Applied, thanks!

[1/1] PCI: dwc: Use multiple ATU regions for large bridge windows
      commit: e9a5415adb209f86a05e55b850127ada82e070f1

Best regards,
-- 
Manivannan Sadhasivam <mani@kernel.org>


      parent reply	other threads:[~2026-01-22  9:36 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-09 11:34 Randolph
2026-01-21 10:41 ` Niklas Cassel
2026-01-21 19:29 ` Charles Mirabile
2026-01-22  9:36   ` Manivannan Sadhasivam
2026-01-22  9:36 ` Manivannan Sadhasivam [this message]

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