From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 11C4930C630 for ; Mon, 26 Jan 2026 04:21:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769401317; cv=none; b=mv0awYBtNzgduhINXlLjRP38g69hNpByGYuuBvkUIvupJ/2W+D4AFOVIF29XUAhPmM1qTY+HsGFpY7w16BuH4QTBXjeAqxQprVWx47OZeaFt3sz+Q9iTYr2pa0puFbn/cCBNs9/iMMY+gEHW25zaGp414MFO697OASJODvV6t0E= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769401317; c=relaxed/simple; bh=+/TmLP7uQZV/QkfJ2BYskF9iGcIhUQOcpCvg+re+VHU=; h=Content-Type:MIME-Version:Subject:From:Message-Id:Date:References: In-Reply-To:To:Cc; b=IvTK5p34MH44UTZiqgErIfHx0jQmNb4P9YhdLh3DUX1iuNGk8aaBxRCMSHAQcFoj6CfYKFAbvDQDec55RXaK9Dp0JKvsucN95pdECiyFGLPBnvlrg/K0Qj95SVMpi8NLr6r0VF8mM9Z/ONilvF0j6fFrQ0ToDKjcA8pwZzJN0cc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=R4rHeXRK; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="R4rHeXRK" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E914EC116C6; Mon, 26 Jan 2026 04:21:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1769401316; bh=+/TmLP7uQZV/QkfJ2BYskF9iGcIhUQOcpCvg+re+VHU=; h=Subject:From:Date:References:In-Reply-To:To:Cc:From; b=R4rHeXRKr46HzJnufDrOmsu5j4AIH9EVSo6a1F05cnSGqoxagpqGojvTqJqJy4sR6 iXju10dKP63UUwvCT9bcJYwpG+49Jrh9V7Ww5Oh7YqU7DKFOUEuoB9nm4dTZAHlVIG oaaG87Xy15z57P7JK4rC3coABIyFS6TktPPC2xZuWqAHv2nZ/UA4+avQED4N/zUI23 xuuguhsrVa8n1D0jyPbLwf5N+ZDB2srFp5HOGdCdb3XfrcG/DNDzDJJZ2sBKEOuVJn i0FlJ1VIkna25AGzdH5peWaKjYTo9R74/qIraQXTahSxRPTUosbEB9sIRIAFwzIPnY p0HgxiVmguKDQ== Received: from [10.30.226.235] (localhost [IPv6:::1]) by aws-us-west-2-korg-oddjob-rhel9-1.codeaurora.org (Postfix) with ESMTP id C8C7A3809A22; Mon, 26 Jan 2026 04:21:52 +0000 (UTC) Content-Type: text/plain; charset="utf-8" Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: Re: [GIT PULL] RISC-V updates for v6.19-rc7 From: patchwork-bot+linux-riscv@kernel.org Message-Id: <176940131135.4057692.4058115103852267681.git-patchwork-notify@kernel.org> Date: Mon, 26 Jan 2026 04:21:51 +0000 References: <081aefd5-d47d-8397-693a-3e0a3c73783e@kernel.org> In-Reply-To: <081aefd5-d47d-8397-693a-3e0a3c73783e@kernel.org> To: Paul Walmsley Cc: linux-riscv@lists.infradead.org, torvalds@linux-foundation.org, linux-kernel@vger.kernel.org Hello: This pull request was applied to riscv/linux.git (fixes) by Linus Torvalds : On Sat, 24 Jan 2026 16:21:29 -0700 (MST) you wrote: > Linus, > > Please pull these RISC-V fixes for v6.19-rc7. > > The notable changes here are the three RISC-V timer compare register > update sequence patches. These only apply to RV32 systems and are related > to the 64-bit timer compare value being split across two separate 32-bit > registers. We weren't using the appropriate three-write sequence, > documented in the RISC-V ISA specifications, to avoid spurious timer > interrupts during the update sequence; so, these patches now use the > recommended sequence. This doesn't affect 64-bit RISC-V systems, since > the timer compare value fits inside a single register and can be updated > with a single write. > > [...] Here is the summary with links: - [GIT,PULL] RISC-V updates for v6.19-rc7 https://git.kernel.org/riscv/c/d91a46d6805a You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html