From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 45FAA2FE074 for ; Mon, 26 Jan 2026 04:24:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769401488; cv=none; b=PsJ/cey1qJUVCVfIuubdr+mEtVZrc+uG2sGvqo0k6PFBgn6YnUWwowCOAve6LjmXwA9T5I4ZJfWEkKuSp/wTN9vpY/TpsAlxneboPJMYeLT/0eC/KaWwvT+lz9Xz4n3YMTqfP6HVL4N6F7VCDe+W0C0bQmjCB64yaUhNrdte2MY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769401488; c=relaxed/simple; bh=JSejbYgtiqeN+MKAs0kx7DLRclH8e3koxThdNwQ0AYo=; h=Content-Type:MIME-Version:Subject:From:Message-Id:Date:References: In-Reply-To:To:Cc; b=rg6PBwrpeuBhRIsTPHBkEzIqTlg3pmrJCcbeyv2qNkHekj1Hxcz+6iX/bogv9ZiHLoS3G+3sPDZPaNcJbatIA4Vm7eWveOQZqp+FMJN1Hc+x8T8/qdUV8Lpr4oC7u0c5oWvS626RlgOwAOiIVbMvu2SDfzz0NmQPKFZSecjLmS8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=n/R2ykch; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="n/R2ykch" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D27EAC116C6; Mon, 26 Jan 2026 04:24:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1769401487; bh=JSejbYgtiqeN+MKAs0kx7DLRclH8e3koxThdNwQ0AYo=; h=Subject:From:Date:References:In-Reply-To:To:Cc:From; b=n/R2ykchlnfACcKLv1Dg0VYPM5FR7BG4Z8BBKi1+gZU9W4OkFkLdMp5kmMVUyUBzP 03EyW20SwRiXBdf9YLvNcozzSBdx6dqhvwhTvMfdra8/vosRWylxGjY0rCNWd74fW9 DkYHRDfuVyRYoBXCK1Y7/5FZqEfjWHLY27DiIiPg5lo9qNfUsoIaLEkHalRuOUeeeO YcB+PTuTIouCiNkJJu02GMf6GhOACcNzUncweLAmhjcoxV6nqR+FDWxwsTnDj02w6j cQpVxCfoNYTo7/NjraVtZ4yrFyeTzh0CjeIe750SmVqfgZSyw37P8mlhOw0Krl1TyE obrcutFFIlUOQ== Received: from [10.30.226.235] (localhost [IPv6:::1]) by aws-us-west-2-korg-oddjob-rhel9-1.codeaurora.org (Postfix) with ESMTP id C8D633809A22; Mon, 26 Jan 2026 04:24:43 +0000 (UTC) Content-Type: text/plain; charset="utf-8" Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: Re: [GIT PULL] RISC-V updates for v6.19-rc7 From: patchwork-bot+linux-riscv@kernel.org Message-Id: <176940148235.4057692.2736512531319710578.git-patchwork-notify@kernel.org> Date: Mon, 26 Jan 2026 04:24:42 +0000 References: <081aefd5-d47d-8397-693a-3e0a3c73783e@kernel.org> In-Reply-To: <081aefd5-d47d-8397-693a-3e0a3c73783e@kernel.org> To: Paul Walmsley Cc: linux-riscv@lists.infradead.org, torvalds@linux-foundation.org, linux-kernel@vger.kernel.org Hello: This pull request was applied to riscv/linux.git (for-next) by Linus Torvalds : On Sat, 24 Jan 2026 16:21:29 -0700 (MST) you wrote: > Linus, > > Please pull these RISC-V fixes for v6.19-rc7. > > The notable changes here are the three RISC-V timer compare register > update sequence patches. These only apply to RV32 systems and are related > to the 64-bit timer compare value being split across two separate 32-bit > registers. We weren't using the appropriate three-write sequence, > documented in the RISC-V ISA specifications, to avoid spurious timer > interrupts during the update sequence; so, these patches now use the > recommended sequence. This doesn't affect 64-bit RISC-V systems, since > the timer compare value fits inside a single register and can be updated > with a single write. > > [...] Here is the summary with links: - [GIT,PULL] RISC-V updates for v6.19-rc7 https://git.kernel.org/riscv/c/d91a46d6805a You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html