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Thu, 29 Jan 2026 00:33:49 -0800 (PST) Received: from brgl-qcom.home ([2a01:cb1d:dc:7e00:eb30:6a8a:1705:215e]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-435e10e4757sm13298559f8f.5.2026.01.29.00.33.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Jan 2026 00:33:49 -0800 (PST) From: Bartosz Golaszewski To: linusw@kernel.org, brgl@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, thierry.reding@gmail.com, jonathanh@nvidia.com, robh@kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, Prathamesh Shete Cc: Bartosz Golaszewski , Thierry Reding Subject: Re: (subset) [PATCH v5 1/3] dt-bindings: gpio: Add Tegra264 support Date: Thu, 29 Jan 2026 09:33:47 +0100 Message-ID: <176967547599.5796.2816287193040668949.b4-ty@oss.qualcomm.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260128085114.1137725-1-pshete@nvidia.com> References: <20260128085114.1137725-1-pshete@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI5MDA1MSBTYWx0ZWRfX/Q6Y9ngaOgnD VpIoAAVqsUHskasiYdoeaE/xl/S9gij95uwMPD91Bm7krZyn54XG3W+qIDSrFzAC7fJE6aTaHUn LScfoXwOD8+ZJGJ/SQtJFyvrl/uIDFUpAckgMsE80ecD7/XfXO5RA0l+jCHuDkdEiD+8vuHmm88 ShqwRo+TuXLl8xNX4ImmUh8wyv+iP54gOILb9vixPoy5O4qXhGEa34oL4Xa53sWvu6fKbl4MNCc k3uVfIj40PK7J3JunE+DUhnpRPKJT3q7wTO7g04wLLW0R40SQKlA3e2WGHCLbeui8YsAkML2hR3 HY8YFxfs6WGpFkdv9OHJBKNJDQFeR9cmNzcOgpgp082SQC9sQp/GtSE2iToEpFWGPynXIIhSDlY 4c7QUd8HsQEEZ+QXXKazhfXAUazdcRMMg5Lm+gsUpGDEWGQ5HY2jhQf2ddGmTeD+ajuWeG5nMSZ rI5UfCeEKSgBng7r+Bw== X-Authority-Analysis: v=2.4 cv=QpRTHFyd c=1 sm=1 tr=0 ts=697b1b6f cx=c_pps a=oc9J++0uMp73DTRD5QyR2A==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=mkNFcrO7423Z3Jl_UjwA:9 a=QEXdDO2ut3YA:10 a=iYH6xdkBrDN1Jqds4HTS:22 X-Proofpoint-GUID: UQK14ELL9Dmz8vwXUDqJzixoKRgl_7t_ X-Proofpoint-ORIG-GUID: UQK14ELL9Dmz8vwXUDqJzixoKRgl_7t_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-29_01,2026-01-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 lowpriorityscore=0 clxscore=1015 priorityscore=1501 phishscore=0 impostorscore=0 bulkscore=0 malwarescore=0 spamscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601290051 On Wed, 28 Jan 2026 08:51:12 +0000, Prathamesh Shete wrote: > Extend the existing Tegra186 GPIO controller device tree bindings with > support for the GPIO controller found on Tegra264. The number of pins > is slightly different, but the programming model remains the same. > > Add a new header, include/dt-bindings/gpio/nvidia,tegra264-gpio.h, > that defines port IDs as well as the TEGRA264_MAIN_GPIO() helper, > both of which are used in conjunction to create a unique specifier > for each pin. > > [...] Fixed whitespace errors and applied, thanks! [1/3] dt-bindings: gpio: Add Tegra264 support https://git.kernel.org/brgl/c/b565717e1d50078b8f13f3f796e707d24a6f3fdc [2/3] gpio: tegra186: Add support for Tegra264 https://git.kernel.org/brgl/c/af9b4a56f0000fb11057e204ddfb05d72ba4dba0 Best regards, -- Bartosz Golaszewski