From: Vinod Koul <vkoul@kernel.org>
To: bhelgaas@google.com, mani@kernel.org,
Devendra K Verma <devendra.verma@amd.com>
Cc: dmaengine@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, michal.simek@amd.com,
Devendra.Verma@amd.com
Subject: Re: [PATCH v13 0/2] Add AMD MDB Endpoint and non-LL mode Support
Date: Wed, 18 Mar 2026 16:57:37 +0530 [thread overview]
Message-ID: <177383325715.408483.18354973261373934236.b4-ty@kernel.org> (raw)
In-Reply-To: <20260311111834.3750297-1-devendra.verma@amd.com>
On Wed, 11 Mar 2026 16:48:32 +0530, Devendra K Verma wrote:
> This series of patch support the following:
>
> - AMD MDB Endpoint Support, as part of this patch following are
> added:
> o AMD supported device ID and vendor ID (Xilinx)
> o AMD MDB specific driver data
> o AMD specific VSEC capabilities to retrieve the base of
> phys address of MDB side DDR
> o Logic to assign the offsets to LL and data blocks if
> more number of channels are enabled than configured
> in the given pci_data struct.
>
> [...]
Applied, thanks!
[1/2] dmaengine: dw-edma: Add AMD MDB Endpoint Support
commit: 14eb9a1d338fdc301a2297af86818ecf716b1539
[2/2] dmaengine: dw-edma: Add non-LL mode
commit: b7560798466a07d9c3fb011698e92c335ab28baf
Best regards,
--
~Vinod
prev parent reply other threads:[~2026-03-18 11:27 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-11 11:18 Devendra K Verma
2026-03-11 11:18 ` [PATCH v13 1/2] dmaengine: dw-edma: Add AMD MDB Endpoint Support Devendra K Verma
2026-03-11 11:18 ` [PATCH v13 2/2] dmaengine: dw-edma: Add non-LL mode Devendra K Verma
2026-03-17 11:02 ` [PATCH v13 0/2] Add AMD MDB Endpoint and non-LL mode Support Vinod Koul
2026-03-17 12:24 ` Verma, Devendra
2026-03-18 7:03 ` Verma, Devendra
2026-03-18 11:27 ` Vinod Koul [this message]
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