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Fri, 15 May 2026 09:52:32 -0700 (PDT) Received: from [192.168.1.11] ([120.60.141.122]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2bd5cfe49a4sm58330965ad.38.2026.05.15.09.52.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 May 2026 09:52:31 -0700 (PDT) From: Manivannan Sadhasivam X-Google-Original-From: Manivannan Sadhasivam To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Qiang Yu Cc: linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Manivannan Sadhasivam In-Reply-To: <20260508-mix_perst_phy_dts-v1-1-9eff6ee9b51a@oss.qualcomm.com> References: <20260508-mix_perst_phy_dts-v1-1-9eff6ee9b51a@oss.qualcomm.com> Subject: Re: [PATCH] PCI: qcom: Handle mixed PERST#/PHY DT configuration Message-Id: <177886394865.8489.5707435379388898546.b4-ty@kernel.org> Date: Fri, 15 May 2026 22:22:28 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Mailer: b4 0.14.3 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTE1MDE3MSBTYWx0ZWRfX6M7i3Ca4kHMM xTlUMhgzpr8wwXKzodmUcIsNCg07RvbrT30iIRkLIGPObxynzXYX39IBYXefOkWSGwHwbNhThY5 klrAhtvUC4WqPu7xxV/Mkh8gMiCF+tc/1ZCViH4+/DMG11eDSb6T+aNaOjGHH8ZArGbutLM0Nl/ noyoyFvgN8WtQHSw2nPuj74DtYH5LDD62zEYwSyTMF5iQUnQiBYpvvrgME7fi5ZQ7bbOWAEi2g3 wfmslh1W1wpuyqekc0N45LvCyq0LJcp9WcTnzTjB+S2d0t+pYdZ/1uy3nicLJ4Lf133eViLqHuk sCka0yu9/VZVTKwYlVgcrEoovzJO4kM9rTnfmk0pmERgzWb19P16SD/2qT3e7qgaXfPNLAXDyrV DZhEBWb5kLWJ0TJgTIXPNtLDtRVtUSM4UZpi71pXwNiUApFuQsfWmVi8llbBf5RH4mCOht8JZzl s5oK6ySidgqF9nNPctA== X-Proofpoint-GUID: fFfOLLV6DGZDgGiaPKrnXekujGc_BMyh X-Proofpoint-ORIG-GUID: fFfOLLV6DGZDgGiaPKrnXekujGc_BMyh X-Authority-Analysis: v=2.4 cv=BvqtB4X5 c=1 sm=1 tr=0 ts=6a074f52 cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=8TBCxnFsifAbGBbxUCxq8g==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=VwQbUJbxAAAA:8 a=JucjwYXNH_3_nybdtf0A:9 a=QEXdDO2ut3YA:10 a=1OuFwYUASf3TG4hYMiVC:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-15_04,2026-05-15_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 phishscore=0 clxscore=1015 priorityscore=1501 spamscore=0 malwarescore=0 bulkscore=0 adultscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605150171 On Fri, 08 May 2026 02:54:19 -0700, Qiang Yu wrote: > The driver currently supports two PERST# and PHY DT configuration. In one > case, PHY, PERST#, are described in the RC node. In the other case, they > are described in the RP node. > > A mixed setup is not supported. One common example is PHY on the RP node > while PERST# remains on the RC node. In that case the driver goes through > the RP parse path, does not find PERST# on RP, and does not report an > error because PERST# is optional. Probe can then succeed silently while > PERST# is left uncontrolled, and PCIe endpoints fails to work later. This > silent probe success makes debugging difficult. > > [...] Applied, thanks! [1/1] PCI: qcom: Handle mixed PERST#/PHY DT configuration commit: d160e4d32a8b94e534f7c491374b99cf44baa4e0 Best regards, -- Manivannan Sadhasivam