From: "tip-bot2 for Thomas Gleixner" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Thomas Gleixner <tglx@kernel.org>,
"Peter Zijlstra (Intel)" <peterz@infradead.org>,
andrealmeid@igalia.com, x86@kernel.org,
linux-kernel@vger.kernel.org
Subject: [tip: locking/core] uaccess: Provide unsafe_atomic_store_release_user()
Date: Wed, 03 Jun 2026 14:24:59 -0000 [thread overview]
Message-ID: <178049669993.710.16750845848504294626.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20260602090535.513181528@kernel.org>
The following commit has been merged into the locking/core branch of tip:
Commit-ID: 6149fc36c09b91050b62e8e68a91027df8df7345
Gitweb: https://git.kernel.org/tip/6149fc36c09b91050b62e8e68a91027df8df7345
Author: Thomas Gleixner <tglx@kernel.org>
AuthorDate: Tue, 02 Jun 2026 11:09:42 +02:00
Committer: Peter Zijlstra <peterz@infradead.org>
CommitterDate: Wed, 03 Jun 2026 11:38:50 +02:00
uaccess: Provide unsafe_atomic_store_release_user()
The upcoming support for unlocking robust futexes in the kernel requires
store release semantics. Syscalls do not imply memory ordering on all
architectures so the unlock operation requires a barrier.
This barrier can be avoided when stores imply release like on x86.
Provide a generic version with a smp_mb() before the unsafe_put_user(),
which can be overridden by architectures.
Provide also a ARCH_MEMORY_ORDER_TSO Kconfig option, which can be selected
by architectures with Total Store Order (TSO), where store implies release,
so that the smp_mb() in the generic implementation can be avoided.
If that is set a barrier() is used instead of smp_mb(), which is not
required for the use case at hand, but makes it future proof for other
usage to prevent the compiler from reordering.
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: André Almeida <andrealmeid@igalia.com>
Link: https://patch.msgid.link/20260602090535.513181528@kernel.org
---
arch/Kconfig | 4 ++++
include/linux/uaccess.h | 11 +++++++++++
2 files changed, 15 insertions(+)
diff --git a/arch/Kconfig b/arch/Kconfig
index e868800..83d362f 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -403,6 +403,10 @@ config ARCH_32BIT_OFF_T
config ARCH_32BIT_USTAT_F_TINODE
bool
+# Selected by architectures with Total Store Order (TSO)
+config ARCH_MEMORY_ORDER_TSO
+ bool
+
config HAVE_ASM_MODVERSIONS
bool
help
diff --git a/include/linux/uaccess.h b/include/linux/uaccess.h
index 5632860..c6bd200 100644
--- a/include/linux/uaccess.h
+++ b/include/linux/uaccess.h
@@ -649,6 +649,17 @@ static inline void user_access_restore(unsigned long flags) { }
#define user_read_access_end user_access_end
#endif
+#ifndef unsafe_atomic_store_release_user
+# define unsafe_atomic_store_release_user(val, uptr, elbl) \
+ do { \
+ if (!IS_ENABLED(CONFIG_ARCH_MEMORY_ORDER_TSO)) \
+ smp_mb(); \
+ else \
+ barrier(); \
+ unsafe_put_user(val, uptr, elbl); \
+ } while (0)
+#endif
+
/* Define RW variant so the below _mode macro expansion works */
#define masked_user_rw_access_begin(u) masked_user_access_begin(u)
#define user_rw_access_begin(u, s) user_access_begin(u, s)
next prev parent reply other threads:[~2026-06-03 14:25 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-02 9:09 [patch V5 00/16] futex: Address the robust futex unlock race for real Thomas Gleixner
2026-06-02 9:09 ` [patch V5 01/16] percpu: Sanitize __percpu_qual include hell Thomas Gleixner
2026-06-03 14:25 ` [tip: locking/core] " tip-bot2 for Thomas Gleixner
2026-06-02 9:09 ` [patch V5 02/16] futex: Move futex task related data into a struct Thomas Gleixner
2026-06-03 14:25 ` [tip: locking/core] " tip-bot2 for Thomas Gleixner
2026-06-02 9:09 ` [patch V5 03/16] futex: Make futex_mm_init() void Thomas Gleixner
2026-06-03 14:25 ` [tip: locking/core] " tip-bot2 for Thomas Gleixner
2026-06-02 9:09 ` [patch V5 04/16] futex: Move futex related mm_struct data into a struct Thomas Gleixner
2026-06-03 14:25 ` [tip: locking/core] " tip-bot2 for Thomas Gleixner
2026-06-02 9:09 ` [patch V5 05/16] futex: Provide UABI defines for robust list entry modifiers Thomas Gleixner
2026-06-03 14:25 ` [tip: locking/core] " tip-bot2 for Thomas Gleixner
2026-06-02 9:09 ` [patch V5 06/16] uaccess: Provide unsafe_atomic_store_release_user() Thomas Gleixner
2026-06-03 14:24 ` tip-bot2 for Thomas Gleixner [this message]
2026-06-02 9:09 ` [patch V5 07/16] x86: Select ARCH_MEMORY_ORDER_TSO Thomas Gleixner
2026-06-03 14:24 ` [tip: locking/core] " tip-bot2 for Thomas Gleixner
2026-06-02 9:09 ` [patch V5 08/16] futex: Cleanup UAPI defines Thomas Gleixner
2026-06-03 14:24 ` [tip: locking/core] " tip-bot2 for Thomas Gleixner
2026-06-04 8:23 ` [patch V5 08/16] " David Laight
2026-06-02 9:09 ` [patch V5 09/16] futex: Add support for unlocking robust futexes Thomas Gleixner
2026-06-03 8:22 ` Peter Zijlstra
2026-06-03 9:30 ` Peter Zijlstra
2026-06-03 14:40 ` Thomas Gleixner
2026-06-03 8:35 ` Peter Zijlstra
2026-06-03 14:24 ` [tip: locking/core] " tip-bot2 for Thomas Gleixner
2026-06-02 9:09 ` [patch V5 10/16] futex: Add robust futex unlock IP range Thomas Gleixner
2026-06-03 14:24 ` [tip: locking/core] " tip-bot2 for Thomas Gleixner
2026-06-02 9:10 ` [patch V5 11/16] futex: Provide infrastructure to plug the non contended robust futex unlock race Thomas Gleixner
2026-06-03 8:42 ` Peter Zijlstra
2026-06-03 9:14 ` Peter Zijlstra
2026-06-03 14:47 ` Thomas Gleixner
2026-06-03 9:23 ` Peter Zijlstra
2026-06-03 14:42 ` Thomas Gleixner
2026-06-03 14:24 ` [tip: locking/core] " tip-bot2 for Thomas Gleixner
2026-06-02 9:10 ` [patch V5 12/16] x86/vdso: Prepare for robust futex unlock support Thomas Gleixner
2026-06-03 14:24 ` [tip: locking/core] " tip-bot2 for Thomas Gleixner
2026-06-02 9:10 ` [patch V5 13/16] x86/vdso: Implement __vdso_futex_robust_try_unlock() Thomas Gleixner
2026-06-03 14:24 ` [tip: locking/core] " tip-bot2 for Thomas Gleixner
2026-06-02 9:10 ` [patch V5 14/16] Documentation: futex: Add a note about robust list race condition Thomas Gleixner
2026-06-03 14:24 ` [tip: locking/core] " tip-bot2 for André Almeida
2026-06-02 9:10 ` [patch V5 15/16] selftests: futex: Add tests for robust release operations Thomas Gleixner
2026-06-03 14:24 ` [tip: locking/core] " tip-bot2 for André Almeida
2026-06-02 9:10 ` [patch V5 16/16] [RFC] vdso, x86: Expose vdso.so.dbg through sysfs Thomas Gleixner
2026-06-02 10:39 ` Thomas Weißschuh
2026-06-02 20:02 ` Thomas Gleixner
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