[tip: locking/core] locking/qspinlock: Clarify pending field layout

["tip-bot2 for WEI-HONG, YE" <tip-bot2@linutronix.de>]

The following commit has been merged into the locking/core branch of tip:

Commit-ID:     cb19b8a9add2ed3774c1276e0a3906e52e8cf39a
Gitweb:        https://git.kernel.org/tip/cb19b8a9add2ed3774c1276e0a3906e52e8cf39a
Author:        WEI-HONG, YE <1234567weewee457@gmail.com>
AuthorDate:    Mon, 25 May 2026 13:04:50 
Committer:     Peter Zijlstra <peterz@infradead.org>
CommitterDate: Wed, 03 Jun 2026 11:38:46 +02:00

locking/qspinlock: Clarify pending field layout

For CONFIG_NR_CPUS < 16K, _Q_PENDING_BITS is 8 and the pending
field occupies bits 8-15 of the lock word. The current comment
documents bit 8 as pending and bits 9-15 as unused, which describes
the pending flag value rather than the field layout.

Describe bits 8-15 as the pending byte so the layout description
is consistent with the lock byte.

Signed-off-by: WEI-HONG, YE <1234567weewee457@gmail.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Waiman Long <longman@redhat.com>
Link: https://patch.msgid.link/20260525130450.723937-1-1234567weewee457@gmail.com
---
 include/asm-generic/qspinlock_types.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/asm-generic/qspinlock_types.h b/include/asm-generic/qspinlock_types.h
index 2fd1fb8..7d17b9b 100644
--- a/include/asm-generic/qspinlock_types.h
+++ b/include/asm-generic/qspinlock_types.h
@@ -53,8 +53,7 @@ typedef struct qspinlock {
  *
  * When NR_CPUS < 16K
  *  0- 7: locked byte
- *     8: pending
- *  9-15: not used
+ *  8-15: pending byte
  * 16-17: tail index
  * 18-31: tail cpu (+1)
  *