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Tue, 09 Jun 2026 08:46:45 -0700 (PDT) Received: from [192.168.1.11] ([120.56.203.186]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2c164f8792bsm223401015ad.23.2026.06.09.08.46.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Jun 2026 08:46:44 -0700 (PDT) From: Manivannan Sadhasivam X-Google-Original-From: Manivannan Sadhasivam To: frank.li@nxp.com, l.stach@pengutronix.de, lpieralisi@kernel.org, kwilczynski@kernel.org, robh@kernel.org, bhelgaas@google.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, Richard Zhu Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org In-Reply-To: <20260518072715.3166514-1-hongxing.zhu@nxp.com> References: <20260518072715.3166514-1-hongxing.zhu@nxp.com> Subject: Re: [PATCH v2 0/2] PCI: imx6: Fix i.MX95 PCIe PHY initialization sequence Message-Id: <178101999933.10755.15039783004341281715.b4-ty@kernel.org> Date: Tue, 09 Jun 2026 21:16:39 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Mailer: b4 0.14.3 X-Proofpoint-ORIG-GUID: MFxTTGKXm0SnOkjzMNHJgP-ozdzY2F2- X-Authority-Analysis: v=2.4 cv=EI42FVZC c=1 sm=1 tr=0 ts=6a283566 cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=eDurORsI8St+1bJHqsJewQ==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=VwQbUJbxAAAA:8 a=6xSj6z8mzX6N8v9Jz00A:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-GUID: MFxTTGKXm0SnOkjzMNHJgP-ozdzY2F2- X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjA5MDE0OSBTYWx0ZWRfXz+Eg36CP5ohT n1T+oxaES1Ycu8afLWaXOxz/BsHdcvnjPch4G89h+ZAvvUCvNNzNlvLqbUeBiJW+Jupp5qfc7Zr ehEwRSa/xHY8RrsVB38OpnwYS9sLOK+Zlq8QupWDf0SLpZL5p7cNVpMw8VQm9iVQqbQuFXbQ02d tZvf4/qra4mxQN6ZZV6oofXXXQkt+ljOgHSZAtTnhGPnwo6c/B/4y7VoWJBf+5X2TWHiSyawOpU v2n8Q/OpJs7kY4VAXlLZG0UsLODxJWxG1BPqjtWX8sIxVS8c3scSGn+1L6gEEp7WHqNzsknHdu4 PZ1Fj+757HhmXqdMbkGaY3zmXcnDyvs7Of+CEiMbg7aJwVGn3xwVdwbiL0Oa6yCT8P1s/XLiMwr MfcQu5n681GlPvw8QoYiUXBi8qtipfPa5Ic1nF966S7Q0nG0fJ+azbpMD/EOYIwOvhE0n4MnpUG /1fwASCQP6vVumdK7Yw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-09_03,2026-06-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 adultscore=0 bulkscore=0 phishscore=0 suspectscore=0 malwarescore=0 priorityscore=1501 clxscore=1015 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606090149 On Mon, 18 May 2026 15:27:13 +0800, Richard Zhu wrote: > This series addresses PHY initialization sequence issues for i.MX95 PCIe > that were identified through careful review of the i.MX95 PCIe PHY Databook. > > The current implementation does not strictly follow the timing requirements > specified in the PHY documentation for reference clock configuration and > PHY reset sequencing. These violations can potentially lead to unreliable > PHY initialization. > > [...] Applied, thanks! [1/2] PCI: imx6: Configure REF_USE_PAD before PHY reset for i.MX95 commit: 0c26b1c34d12d4debfb5363cc0be6cdf68e87ba2 [2/2] PCI: imx6: Assert ref_clk_en after reference clock stabilizes on i.MX95 commit: 9dda3f83ba677b9cc2613cecd9120123000ae50f Best regards, -- Manivannan Sadhasivam