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Tue, 30 Jun 2026 07:52:16 -0700 (PDT) Received: from brgl-qcom.home ([2a01:cb1d:dc:7e00:a2d4:ac8b:bb21:2661]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-493bb1bcd1esm41326815e9.2.2026.06.30.07.52.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Jun 2026 07:52:15 -0700 (PDT) From: Bartosz Golaszewski To: Bjorn Andersson , Linus Walleij , Neil Armstrong , Krzysztof Kozlowski , Sneh Mankad Cc: Bartosz Golaszewski , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org, Maulik Shah Subject: Re: [PATCH v3] pinctrl: qcom: Unconditionally mark gpio as wakeup enable Date: Tue, 30 Jun 2026 16:52:13 +0200 Message-ID: <178283113076.37349.4420730863475722984.b4-ty@oss.qualcomm.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260616-enable_wakeup_capable_gpios-v3-1-fb59647d89cb@oss.qualcomm.com> References: <20260616-enable_wakeup_capable_gpios-v3-1-fb59647d89cb@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjMwMDEzOSBTYWx0ZWRfX4w/SR+NNLRbp OgebTbMWRQncmuHV2UZuPIZpdXpVhRn/rD+0sy7rqef6NJhjon8uthyZnWBZykaEPtS9GD3JfkF 64BX2Ed0wD9xF8UbZjydiZaRpyBq8XwbibzQ0IQRhzvs6XCvNJbvyo4t1J76uSqP8G5vVdwqmpd zzQRjy9Lx7zvJjIpfhJILxuV579feoyzYhBbq5Zg2eHpTUnUj0T1wDeUYzpOaZtDgASDjwqhHJM Zv/aqzNNqGpOuwQ/zcosb0/PLTrNQtYOOD3/PtJI1Ecant5uqDfBoEs6BrZNgfrjiHFmnxu3xr+ VSEJbzaI03Z7lnClMyc8udCfwFO03JEI9EFiMmNYY8XR5e1/UU06UhLBcu+2KWrkTDUvGadYhze azrny7AKey6VXhTeAvOB26Vujayup9T0J21tTeQ1pJdubTJhEwOiD7yss2huaZh+FqyvIY17akR vlHOdghZNqXpfu9jlNw== X-Proofpoint-ORIG-GUID: 1b5z9KVN0foFX7wqLxpLq-P0kLxUhRoo X-Proofpoint-GUID: 1b5z9KVN0foFX7wqLxpLq-P0kLxUhRoo X-Authority-Analysis: v=2.4 cv=ftfsol4f c=1 sm=1 tr=0 ts=6a43d823 cx=c_pps a=7E5Bxpl4vBhpaufnMqZlrw==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=Kpg7wRNn3CZZSTE7MwYA:9 a=QEXdDO2ut3YA:10 a=zgiPjhLxNE0A:10 a=pJ04lnu7RYOZP9TFuWaZ:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwNjMwMDEzOSBTYWx0ZWRfX6ccid8Oone3l EmZntaHpKRXlnAtGeWMNFVDAzKMC7KQhOZyAhkdArAGcU8TqbcdG1auBhG4H3iMSmH+fBvUDMj+ nG/0YjpQ9uz8luTYTpgjz55huDKC2eM= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-30_04,2026-06-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 adultscore=0 spamscore=0 clxscore=1015 malwarescore=0 phishscore=0 impostorscore=0 bulkscore=0 lowpriorityscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2606300139 On Tue, 16 Jun 2026 17:24:53 +0530, Sneh Mankad wrote: > GPIO interrupts that are wakeup capable need to be forwarded to wakeup > capable parent irqchip. This is done via writing to it's wakeup_enable bit. > > Currently the bit is set only for PDC irqchip by checking skip_wake_irqs. > skip_wake_irqs is set to differentiate between parent irqchips MPM and > PDC. It is set when the parent irqchip is PDC to inform pinctrl about > skipping the IRQ setting up at TLMM. > > [...] Applied, thanks! [1/1] pinctrl: qcom: Unconditionally mark gpio as wakeup enable https://git.kernel.org/brgl/c/859e02a369ab328a77dfcabf59562100e55f9c5c Best regards, -- Bartosz Golaszewski