From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CC40B47CC69; Thu, 2 Jul 2026 10:16:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782987363; cv=none; b=SAcTx/WcWQka8PxE2euINPvFbSczKapJnUp4BkVIaTLNgsqOtfL9ciMYIZK83R8FhaDT+iSnrDOs4Y63m8nOEohbUygYEAQq3CS45b1GJ2G9L5NbPn5KgH+k5nUib6qbDUK6mGQmurPK7rL2bT1+JkYDPAaOtO+Rh6xGC4OQC4Y= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782987363; c=relaxed/simple; bh=JkmP0q1XpTZP0Hw64PYdxgVD5qdPKUpQLsgFnkHG3to=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=QkrDex86JS43AxvjTYNAu28CPCFLQ18lQZeZ9GSX6y7jnk+8IZVaVeA3ZKRcAgbZUgMnL/XUMH52R57YwwNY4jS059SkEQgg214HmX29doScPyZgxcMhUKnL4UEj6IiavMpDR9FKVQyXsym33jz9kHo9CjJBeFORko/ogtjqa2Q= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=IQ7fd62P; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=6x9ZGJF8; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="IQ7fd62P"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="6x9ZGJF8" Date: Thu, 02 Jul 2026 10:15:59 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1782987360; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Y2Xm8mi/vKc5VWbxzwpG1J2L/Urg/2+nBov0zAWa600=; b=IQ7fd62PvfDvz1oZMyYB53N+sqliYLgmePe69FIClaICA3xaBY1gSWCkEeh1zQhium7lFq N1SYtcoYYwfS3czTb6NL7EPvwXg2wz2qRaoPyBgH7dsHo79hjUqZoRgRiad1p+s2VHGNo3 QCHvp29fOz4khiD/vcbvTWzPRSuWUUwBdJapF1ZDqdERAMAUz8LxLEU8kQ5DRso8pKYmOs r56jo0tdf1j6GegCAgMQbbtgiDjiyNm0YxurTnblTFb1NYFsjUR06kTN4lxxSiouWLPm4y N0Mc6N7XimbDbID1xm8Nw5JR5DE+b91Vclwu2RZyvoX+Ua9pLrODRiNof+s/Xw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1782987360; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Y2Xm8mi/vKc5VWbxzwpG1J2L/Urg/2+nBov0zAWa600=; b=6x9ZGJF8amJCtLScjnreUZ/DOPBmF++xFX3vLODEp7t7v6GuMZsSOLP2QMfnMOoNuRjvk2 19OoKj0tW9EmgsAA== From: "tip-bot2 for Juergen Gross" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/msr] x86/tsc: Stop using 32-bit MSR interfaces Cc: Juergen Gross , Ingo Molnar , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260629060526.3638272-15-jgross@suse.com> References: <20260629060526.3638272-15-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <178298735903.3843924.6045631087927109087.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/msr branch of tip: Commit-ID: 4ff91f7b8fbfb56424f3b63a3b69286df961bb75 Gitweb: https://git.kernel.org/tip/4ff91f7b8fbfb56424f3b63a3b69286df96= 1bb75 Author: Juergen Gross AuthorDate: Mon, 29 Jun 2026 08:05:05 +02:00 Committer: Ingo Molnar CommitterDate: Thu, 02 Jul 2026 11:54:52 +02:00 x86/tsc: Stop using 32-bit MSR interfaces The 32-bit MSR interfaces rdmsr() and rdmsr_safe() are planned to be removed. Use the related 64-bit variants instead. Signed-off-by: Juergen Gross Signed-off-by: Ingo Molnar Link: https://patch.msgid.link/20260629060526.3638272-15-jgross@suse.com --- arch/x86/kernel/tsc.c | 6 +++--- arch/x86/kernel/tsc_msr.c | 15 ++++++++------- 2 files changed, 11 insertions(+), 10 deletions(-) diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index ce10ae4..723347e 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -1221,11 +1221,11 @@ static void __init check_system_tsc_reliable(void) if (is_geode_lx()) { /* RTSC counts during suspend */ #define RTSC_SUSP 0x100 - unsigned long res_low, res_high; + u64 res; =20 - rdmsr_safe(MSR_GEODE_BUSCONT_CONF0, &res_low, &res_high); + rdmsrq_safe(MSR_GEODE_BUSCONT_CONF0, &res); /* Geode_LX - the OLPC CPU has a very reliable TSC */ - if (res_low & RTSC_SUSP) + if (res & RTSC_SUSP) tsc_clocksource_reliable =3D 1; } #endif diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c index 48e6cc1..d74743c 100644 --- a/arch/x86/kernel/tsc_msr.c +++ b/arch/x86/kernel/tsc_msr.c @@ -165,7 +165,8 @@ static const struct x86_cpu_id tsc_msr_cpu_ids[] =3D { */ unsigned long cpu_khz_from_msr(void) { - u32 lo, hi, ratio, freq, tscref; + u32 ratio, freq, tscref; + struct msr val; const struct freq_desc *freq_desc; const struct x86_cpu_id *id; const struct muldiv *md; @@ -178,16 +179,16 @@ unsigned long cpu_khz_from_msr(void) =20 freq_desc =3D (struct freq_desc *)id->driver_data; if (freq_desc->use_msr_plat) { - rdmsr(MSR_PLATFORM_INFO, lo, hi); - ratio =3D (lo >> 8) & 0xff; + rdmsrq(MSR_PLATFORM_INFO, val.q); + ratio =3D (val.l >> 8) & 0xff; } else { - rdmsr(MSR_IA32_PERF_STATUS, lo, hi); - ratio =3D (hi >> 8) & 0x1f; + rdmsrq(MSR_IA32_PERF_STATUS, val.q); + ratio =3D (val.h >> 8) & 0x1f; } =20 /* Get FSB FREQ ID */ - rdmsr(MSR_FSB_FREQ, lo, hi); - index =3D lo & freq_desc->mask; + rdmsrq(MSR_FSB_FREQ, val.q); + index =3D val.l & freq_desc->mask; md =3D &freq_desc->muldiv[index]; =20 /*