From: Bjorn Andersson <andersson@kernel.org>
To: Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
George Moussalem <george.moussalem@outlook.com>
Cc: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, Luo Jie <jie.luo@oss.qualcomm.com>
Subject: Re: [PATCH v2] arm64: dts: qcom: ipq5018: Correct CMN PLL reference clock rate
Date: Sat, 11 Jul 2026 14:49:41 -0500 [thread overview]
Message-ID: <178379938605.163099.6530368854759990280.b4-ty@kernel.org> (raw)
In-Reply-To: <20260521-ipq5018-cmn-pll-rate-fix-v2-1-04b28a92e0f2@outlook.com>
On Thu, 21 May 2026 11:55:58 +0400, George Moussalem wrote:
> The correct CMN PLL reference clock rate for IPQ5018 is 4.8 GHz.
>
> The CMN PLL driver did not account for the ref clock divider which is 2
> for IPQ5018. Therefore, the computed rate was twice the actual output.
>
> With the driver now accounting for the CMN PLL reference clock
> divider (commit: 88c543fff756), set the correct reference clock rate.
>
> [...]
Applied, thanks!
[1/1] arm64: dts: qcom: ipq5018: Correct CMN PLL reference clock rate
commit: 02320d694fa1124b8b77fcb52191141004ef7fbb
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
prev parent reply other threads:[~2026-07-11 19:50 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-21 7:55 George Moussalem via B4 Relay
2026-06-09 15:12 ` Konrad Dybcio
2026-06-09 16:59 ` Kathiravan Thirumoorthy
2026-06-10 3:10 ` Jie Luo
2026-06-10 8:55 ` Konrad Dybcio
2026-07-11 19:49 ` Bjorn Andersson [this message]
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