From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 133C83CB2CF; Fri, 17 Jul 2026 09:26:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784280383; cv=none; b=dIlERm2AaCpTulbzM+3mscyff5BFDbsjqLgpRHge6VAnIT1DuuFYS7ac0/S/3jVBD81hK6thNd0l0A10GXTTyfeWv8wM3MZW9i7xT72dWrJismHj8BsT8tRJWIeVuwkNPZQig+mxqaarf5mZGx5FMsz2orxddiZi+fhk/9oZYfo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784280383; c=relaxed/simple; bh=bNQJLNGsh0WniLEnC+x59e7W8E8fBHrr9CSKKq7TxYM=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=j9JkTjFmW4eRHU7f/qlZtXwfS/HNbOIFvfwzhGabgkC8AiGfVqYdxWkrbxdJmHG9gg77uTsL0Izn/D+BKc2HsquBo0TvR3dYtOb9yNWjogk3xz9cMQ9xZ0cyt/mFuaazbpdId9C9OV4OlpE2P62t916rtIeVLFzTbj1SK0bI+P0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=j/V/8VeI; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=SPKB0hMH; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="j/V/8VeI"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="SPKB0hMH" Date: Fri, 17 Jul 2026 09:26:15 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1784280377; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9SFCFVIkKNDf+ZnJNNdf9lLo+5quO8kNVQyzmdtjxlg=; b=j/V/8VeIjBi3kpkwfL7jlPpCNX1EBnklFZgdVdAsAOguFsNeSSlWlHTqouYTy3qxHcAYDr ZnZl0ewm86ooNlvPRSJZRkH3gCqkaH6wt7+Z1aREO6uqkhteOdZXvH9+1jnNiy6RMESDk0 mTd6Llpl9Eydd/kWW6MBHlxavQfNRvzbS4TVji62RgmMNhJsz7rYYBRfXu7BQ7LnLet+a9 EPJydQxA/lJ392N+bpmlpQCsEKDJj6UwQvWOOsRkaggMION58hOlkfN9+oTTKttreHkjTy 3us4SMGZJI4EnLYbzQtFDFrYFuH2bFSobvHRhf8dNL08Rtu5JcqBPxPpDyW/gw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1784280377; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9SFCFVIkKNDf+ZnJNNdf9lLo+5quO8kNVQyzmdtjxlg=; b=SPKB0hMHZiK16gmYHoy8YtLdTHEj9ZRIpBgEEJb0eFwHM0ubbkXpIcRUKP5HzbRELUQo/z GJpnm1il59UnSAAw== From: "tip-bot2 for Juergen Gross" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/msr] acpi: Stop using 32-bit MSR interfaces Cc: Juergen Gross , Ingo Molnar , "Rafael J. Wysocki (Intel)" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260629060526.3638272-5-jgross@suse.com> References: <20260629060526.3638272-5-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <178428037524.1844600.17621352281196735081.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/msr branch of tip: Commit-ID: f2309cca1acbfa723a036f1e2ba3bef882ed81aa Gitweb: https://git.kernel.org/tip/f2309cca1acbfa723a036f1e2ba3bef882e= d81aa Author: Juergen Gross AuthorDate: Mon, 29 Jun 2026 08:04:55 +02:00 Committer: Ingo Molnar CommitterDate: Fri, 17 Jul 2026 10:26:50 +02:00 acpi: Stop using 32-bit MSR interfaces The 32-bit MSR interfaces rdmsr(), wrmsr(), rdmsr_safe() and wrmsr_safe() are planned to be removed. Use the related 64-bit variants instead. In processor_throttling.c drop needless initializers. Signed-off-by: Juergen Gross Signed-off-by: Ingo Molnar Acked-by: Rafael J. Wysocki (Intel) Link: https://patch.msgid.link/20260629060526.3638272-5-jgross@suse.com --- arch/x86/kernel/acpi/sleep.c | 20 ++++++++------------ drivers/acpi/processor_perflib.c | 11 ++++++----- drivers/acpi/processor_throttling.c | 14 ++------------ 3 files changed, 16 insertions(+), 29 deletions(-) diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c index 91fa262..8dfe987 100644 --- a/arch/x86/kernel/acpi/sleep.c +++ b/arch/x86/kernel/acpi/sleep.c @@ -61,6 +61,7 @@ int x86_acpi_suspend_lowlevel(void) { struct wakeup_header *header =3D (struct wakeup_header *) __va(real_mode_header->wakeup_header); + struct msr val; =20 if (header->signature !=3D WAKEUP_HEADER_SIGNATURE) { printk(KERN_ERR "wakeup header does not match\n"); @@ -82,13 +83,10 @@ int x86_acpi_suspend_lowlevel(void) * with 2-MB L2 Cache and Intel=C2=AE Processor A100 and A110 on 90 * nm process with 512-KB L2 Cache Specification Update". */ - if (!rdmsr_safe(MSR_EFER, - &header->pmode_efer_low, - &header->pmode_efer_high) && - !wrmsr_safe(MSR_EFER, - header->pmode_efer_low, - header->pmode_efer_high)) + if (!rdmsrq_safe(MSR_EFER, &val.q) && !wrmsrq_safe(MSR_EFER, val.q)) header->pmode_behavior |=3D (1 << WAKEUP_BEHAVIOR_RESTORE_EFER); + header->pmode_efer_low =3D val.l; + header->pmode_efer_high =3D val.h; #endif /* !CONFIG_64BIT */ =20 header->pmode_cr0 =3D read_cr0(); @@ -96,14 +94,12 @@ int x86_acpi_suspend_lowlevel(void) header->pmode_cr4 =3D __read_cr4(); header->pmode_behavior |=3D (1 << WAKEUP_BEHAVIOR_RESTORE_CR4); } - if (!rdmsr_safe(MSR_IA32_MISC_ENABLE, - &header->pmode_misc_en_low, - &header->pmode_misc_en_high) && - !wrmsr_safe(MSR_IA32_MISC_ENABLE, - header->pmode_misc_en_low, - header->pmode_misc_en_high)) + if (!rdmsrq_safe(MSR_IA32_MISC_ENABLE, &val.q) && + !wrmsrq_safe(MSR_IA32_MISC_ENABLE, val.q)) header->pmode_behavior |=3D (1 << WAKEUP_BEHAVIOR_RESTORE_MISC_ENABLE); + header->pmode_misc_en_low =3D val.l; + header->pmode_misc_en_high =3D val.h; header->realmode_flags =3D acpi_realmode_flags; header->real_magic =3D 0x12345678; =20 diff --git a/drivers/acpi/processor_perflib.c b/drivers/acpi/processor_perfli= b.c index fdf55c2..9e25d61 100644 --- a/drivers/acpi/processor_perflib.c +++ b/drivers/acpi/processor_perflib.c @@ -287,7 +287,8 @@ end: */ static void amd_fixup_frequency(struct acpi_processor_px *px, int i) { - u32 hi, lo, fid, did; + struct msr val; + u32 fid, did; int index =3D px->control & 0x00000007; =20 if (boot_cpu_data.x86_vendor !=3D X86_VENDOR_AMD) @@ -295,16 +296,16 @@ static void amd_fixup_frequency(struct acpi_processor_p= x *px, int i) =20 if ((boot_cpu_data.x86 =3D=3D 0x10 && boot_cpu_data.x86_model < 10) || boot_cpu_data.x86 =3D=3D 0x11) { - rdmsr(MSR_AMD_PSTATE_DEF_BASE + index, lo, hi); + rdmsrq(MSR_AMD_PSTATE_DEF_BASE + index, val.q); /* * MSR C001_0064+: * Bit 63: PstateEn. Read-write. If set, the P-state is valid. */ - if (!(hi & BIT(31))) + if (!(val.h & BIT(31))) return; =20 - fid =3D lo & 0x3f; - did =3D (lo >> 6) & 7; + fid =3D val.l & 0x3f; + did =3D (val.l >> 6) & 7; if (boot_cpu_data.x86 =3D=3D 0x10) px->core_frequency =3D (100 * (fid + 0x10)) >> did; else diff --git a/drivers/acpi/processor_throttling.c b/drivers/acpi/processor_thr= ottling.c index c0f92b9..d1605e0 100644 --- a/drivers/acpi/processor_throttling.c +++ b/drivers/acpi/processor_throttling.c @@ -698,20 +698,13 @@ static int acpi_processor_get_throttling_fadt(struct ac= pi_processor *pr) #ifdef CONFIG_X86 static int acpi_throttling_rdmsr(u64 *value) { - u64 msr_high, msr_low; - u64 msr =3D 0; int ret =3D -1; =20 if ((this_cpu_read(cpu_info.x86_vendor) !=3D X86_VENDOR_INTEL) || !this_cpu_has(X86_FEATURE_ACPI)) { pr_err("HARDWARE addr space,NOT supported yet\n"); } else { - msr_low =3D 0; - msr_high =3D 0; - rdmsr_safe(MSR_IA32_THERM_CONTROL, - (u32 *)&msr_low, (u32 *) &msr_high); - msr =3D (msr_high << 32) | msr_low; - *value =3D (u64) msr; + rdmsrq_safe(MSR_IA32_THERM_CONTROL, value); ret =3D 0; } return ret; @@ -720,15 +713,12 @@ static int acpi_throttling_rdmsr(u64 *value) static int acpi_throttling_wrmsr(u64 value) { int ret =3D -1; - u64 msr; =20 if ((this_cpu_read(cpu_info.x86_vendor) !=3D X86_VENDOR_INTEL) || !this_cpu_has(X86_FEATURE_ACPI)) { pr_err("HARDWARE addr space,NOT supported yet\n"); } else { - msr =3D value; - wrmsr_safe(MSR_IA32_THERM_CONTROL, - msr & 0xffffffff, msr >> 32); + wrmsrq_safe(MSR_IA32_THERM_CONTROL, value); ret =3D 0; } return ret;