From: Will Deacon <will@kernel.org>
To: catalin.marinas@arm.com, corbet@lwn.net,
skhan@linuxfoundation.org, robin.murphy@arm.com, joro@8bytes.org,
nicolinc@nvidia.com, jgg@ziepe.ca,
Ashish Mhetre <amhetre@nvidia.com>
Cc: kernel-team@android.com, Will Deacon <will@kernel.org>,
linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org, iommu@lists.linux.dev,
linux-tegra@vger.kernel.org
Subject: Re: [PATCH v9 0/4] iommu/arm-smmu-v3: Tegra264 invalidation workaround
Date: Tue, 28 Jul 2026 12:15:24 +0100 [thread overview]
Message-ID: <178523218770.339148.16144926256012413621.b4-ty@kernel.org> (raw)
In-Reply-To: <20260726081904.1408859-1-amhetre@nvidia.com>
On Sun, 26 Jul 2026 08:19:00 +0000, Ashish Mhetre wrote:
> Nvidia Tegra264 SMMUs are affected by an erratum where a TLB entry can
> survive an invalidation that races with concurrent traffic targeting
> the same entry. The hardware-recommended software workaround is to
> issue every CFGI/TLBI command (each followed by CMD_SYNC) twice.
> The second issue must execute only after the first issue's CMD_SYNC
> has completed, giving the sequence:
>
> [...]
Applied to iommu (arm/smmu/updates), thanks!
But please check the comments from Sashiko if you get a chance:
https://sashiko.dev/#/patchset/20260726081904.1408859-1-amhetre@nvidia.com
[1/4] iommu/arm-smmu-v3: Factor out CMDQ batch force-sync conditions
https://git.kernel.org/iommu/c/097bf4a02f2d
[2/4] iommu/arm-smmu-v3: Add CFGI/TLBI-repeat workaround
https://git.kernel.org/iommu/c/95ed2da20283
[3/4] iommu/arm-smmu-v3-iommufd: Report CFGI/TLBI-repeat erratum
https://git.kernel.org/iommu/c/d501d66815ee
[4/4] iommu/arm-smmu-v3: Enable CFGI/TLBI-repeat workaround on Tegra264
https://git.kernel.org/iommu/c/06b15ddcfbc0
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
next prev parent reply other threads:[~2026-07-28 11:15 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-26 8:19 Ashish Mhetre
2026-07-26 8:19 ` [PATCH v9 1/4] iommu/arm-smmu-v3: Factor out CMDQ batch force-sync conditions Ashish Mhetre
2026-07-26 8:19 ` [PATCH v9 2/4] iommu/arm-smmu-v3: Add CFGI/TLBI-repeat workaround Ashish Mhetre
2026-07-26 8:19 ` [PATCH v9 3/4] iommu/arm-smmu-v3-iommufd: Report CFGI/TLBI-repeat erratum Ashish Mhetre
2026-07-26 16:23 ` Jason Gunthorpe
2026-07-26 17:19 ` Nicolin Chen
2026-07-26 8:19 ` [PATCH v9 4/4] iommu/arm-smmu-v3: Enable CFGI/TLBI-repeat workaround on Tegra264 Ashish Mhetre
2026-07-26 16:23 ` Jason Gunthorpe
2026-07-26 17:20 ` Nicolin Chen
2026-07-28 11:15 ` Will Deacon [this message]
2026-07-28 16:48 ` [PATCH v9 0/4] iommu/arm-smmu-v3: Tegra264 invalidation workaround Ashish Mhetre
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=178523218770.339148.16144926256012413621.b4-ty@kernel.org \
--to=will@kernel.org \
--cc=amhetre@nvidia.com \
--cc=catalin.marinas@arm.com \
--cc=corbet@lwn.net \
--cc=iommu@lists.linux.dev \
--cc=jgg@ziepe.ca \
--cc=joro@8bytes.org \
--cc=kernel-team@android.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=nicolinc@nvidia.com \
--cc=robin.murphy@arm.com \
--cc=skhan@linuxfoundation.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®