From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 39A9B455181 for ; Tue, 11 Aug 2026 17:03:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786467821; cv=none; b=B6ZnsK72nAK9rXSQOAgAyM/NRaL7AnGMoOY5Q13iG8yv4ixoD24nsKHPNLyAOSGVP298d1AHGy+TaU+qJbagk9pnEB9n19L1FiwHBZZttR1eO8eGstvigZX70rZv0Jfmy+RdF2APYkZpuNzjPY+OJ88i5gZNvdRX74mRqeClWM8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786467821; c=relaxed/simple; bh=HZs/6rFnuA+velMr8pzthHikIGhnDuOwSqTpZEeEP7A=; h=From:To:Cc:In-Reply-To:References:Subject:Message-Id:Date: MIME-Version:Content-Type; b=h9loFkGY09TjOPYVlQv1CyjxHjLof//SjyXSuLp70FiICamrHVqsAwevAn3rNTsPUYwvyuxDjcuI2BCse3q+i6lAdDi4G5inKXRNdjZ7x2SWXjf4jn2Scu1bLRK/vUNfDxEDQd36o5wMPUJu82epomGRAQT2keMIiA7iGnAttuI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=kVb8LJgR; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="kVb8LJgR" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D0B811F000E9; Tue, 11 Aug 2026 17:03:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1786467818; bh=RE6PaW6oiFSyel2UJhhOSEawLq+P9qyHEog1fKmmdL8=; h=From:To:Cc:In-Reply-To:References:Subject:Date; b=kVb8LJgRSqTvl0nIhU1rXpQ6Or5LyPpq408KhMHnOwhJ/iqKpkp0eXc81bEHRCrqS 4Eg6Gb3tU6qIYIWLZSsG2T5FfQJ/+6jK1AOtCOB0HXOLyuCR1ASZ+iOyWvnWQxIgb2 T0gtuV9vmvsckL+2C0t0lf9TOi8XDMKFBNXFEdvjhwR5VqYTtp4/7gIyyVnX/YbfCk xOqxXpd+HSOKvWBP+jjgTGH8VKnp35wQvJMDm8bh0z0TWqiWWW7zULsollVwohQuIu V01txlFGe6FmDGaFKNxfApj2StvSGLKUWJ2Feqsy5YObNjPcYWfnujrhrxkm7IgXZ2 yEN5V+x4pP79A== From: Vinod Koul To: Neil Armstrong , Heiko Stuebner , Algea Cao , Dmitry Baryshkov , Cristian Ciocaltea Cc: kernel@collabora.com, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Thomas_Niederpr=C3=BCm?= , Simon Wright , Diederik de Haas , Andy Yan , Dmitry Baryshkov , Sashiko , Andy Yan In-Reply-To: <20260723-hdptx-clk-fixes-v5-0-8e786067865f@collabora.com> References: <20260723-hdptx-clk-fixes-v5-0-8e786067865f@collabora.com> Subject: Re: [PATCH v5 00/10] phy: rockchip: samsung-hdptx: Clock fixes and API transition cleanups Message-Id: <178646781244.1081354.2111582665697305280.b4-ty@kernel.org> Date: Tue, 11 Aug 2026 22:33:32 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Mailer: b4 0.13.0 On Thu, 23 Jul 2026 22:41:43 +0300, Cristian Ciocaltea wrote: > This series provides a set of bug fixes and cleanups for the Rockchip > Samsung HDPTX PHY driver. > > The first part of the series addresses clock rate calculation and > synchronization issues. Specifically, it fixes edge cases where the PHY > PLL is pre-programmed by an external component (like a bootloader) or > when changing the color depth (bpc) while keeping the modeline constant. > Because the Common Clock Framework .set_rate() callback might not be > invoked if the pixel clock remains unchanged, this previously led to > out-of-sync states between CCF and the actual HDMI PHY configuration. > > [...] Applied, thanks! [01/10] phy: rockchip: samsung-hdptx: Fix rate recalculation for high bpc commit: f0c2c9c58a48b621b1cb90f0821da422b31af814 [02/10] phy: rockchip: samsung-hdptx: Prevent divide-by-zero when computing clk rate commit: c4fe5a9f379055ce0ec930f6495ae62aad237b89 [03/10] phy: rockchip: samsung-hdptx: Guard against clk rate integer underflow commit: 229788526ff24e0607726e93b74dd2ef157a99cd [04/10] phy: rockchip: samsung-hdptx: Fix rate recalculation for 3.2GHz FRL commit: 9ac3daadb9060360e937a5993a5fd88360d6fdad [05/10] phy: rockchip: samsung-hdptx: Handle uncommitted PHY config changes commit: aec3e4ce25da4ed37bbbfedcbb7107ae9428b183 [06/10] phy: rockchip: samsung-hdptx: Drop TMDS rate setup workaround commit: c2dd42e3ebd76f24bdc21eafe17149bec2ce1394 [07/10] phy: rockchip: samsung-hdptx: Consolidate consumer_put on error path commit: e49e4bc9f90eeb6b672762c6f089e2fafec104c4 [08/10] phy: rockchip: samsung-hdptx: Drop restrict_rate_change handling commit: 1bb1b4769e43ecc8ed30bd30b6d4514614753f2c [09/10] phy: rockchip: samsung-hdptx: Simplify GRF access with FIELD_PREP_WM16() commit: 859fd8ae691e8c89c881da5edf0a827531daa372 [10/10] phy: rockchip: samsung-hdptx: Consistently use bitfield macros commit: f3a8aba9c36f26b5bb1024653d9083f7e1e6d8c8 Best regards, -- ~Vinod