Re: [v9,net-next,3/8] octeontx2-pf: switch: Add pf files hierarchy

[netdev-bot+sashiko@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential
issue(s) to consider:

Critical: 0 · High: 0 · Medium: 0 · Low: 1

- [Low] Scaffolding-only commit: the new user-visible Kconfig symbol
  OCTEONTX_SWITCH (drivers/net/ethernet/marvell/octeontx2/Kconfig:31-39)…

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octeontx2-pf: switch: Add pf files hierarchy

This adds a new user-visible CONFIG_OCTEONTX_SWITCH symbol, creates the
nic/switch/ directory, and links the new stub objects into the rvu_nicpf
module. All of the new sw_* init/deinit and notifier entry points are
empty bodies returning 0.

> diff --git a/drivers/net/ethernet/marvell/octeontx2/Kconfig b/drivers/net/ethernet/marvell/octeontx2/Kconfig
> index 47e549c581f0d..e2fb6dd71078b 100644
> --- a/drivers/net/ethernet/marvell/octeontx2/Kconfig
> +++ b/drivers/net/ethernet/marvell/octeontx2/Kconfig
> @@ -28,6 +28,16 @@ config NDC_DIS_DYNAMIC_CACHING
>  	  , NPA stack pages etc in NDC. Also locks down NIX SQ/CQ/RQ/RSS and
>  	  NPA Aura/Pool contexts.
>  
> +config OCTEONTX_SWITCH
> +	bool "Marvell OcteonTX2 switch driver"
> +	depends on (64BIT && COMPILE_TEST) || ARM64
> +	depends on OCTEONTX2_PF
> +	default n
> +	help
> +	  This driver supports Marvell's OcteonTX2 switch.
> +	  Marvell SWITCH HW can offload L2, L3 flow. ARM core interacts
> +	  with Marvell SW HW thru mbox.
> +

[Severity: Low]
This isn't a bug, but the help text promises behaviour that this commit on
its own does not provide.  At this commit the option only adds two empty
object files: every function it enables is a stub, and nothing in the tree
calls sw_fdb_init(), sw_fdb_deinit(), sw_fl_init(), sw_fl_deinit(),
otx2_sw_fib_init(), otx2_sw_fib_deinit(), otx2_sw_nb_register() or
otx2_sw_nb_unregister().

A grep at this commit for those symbols matches only the newly added
switch/*.c and switch/*.h files, so turning CONFIG_OCTEONTX_SWITCH=y has no
runtime effect here.  The real bodies and the call sites appear later in the
series, where otx2_sw_nb_register() registers the notifiers and calls
sw_fdb_init(), otx2_sw_fib_init() and sw_fl_init().

Would it be preferable to introduce the Kconfig symbol in the patch that
first wires up the functionality, so that no released bisection point offers
a switch option that does nothing?  Alternatively, the help text could say
what is actually offloaded once the series is complete.

Two small nits in the same text: "Marvell SW HW" looks like it should be
"Marvell switch HW", "thru" should be "through", and "default n" is the
Kconfig default and can be dropped.

>  config OCTEONTX2_PF
>  	tristate "Marvell OcteonTX2 NIC Physical Function driver"
>  	select OCTEONTX2_MBOX

[ ... ]

> diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/switch/sw_fdb.c b/drivers/net/ethernet/marvell/octeontx2/nic/switch/sw_fdb.c
> new file mode 100644
> index 0000000000000..500451e85b503
> --- /dev/null
> +++ b/drivers/net/ethernet/marvell/octeontx2/nic/switch/sw_fdb.c
> @@ -0,0 +1,19 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/* Marvell RVU switch driver
> + *
> + * Copyright (C) 2026 Marvell.
> + *
> + */
> +#include "sw_fdb.h"
> +
> +#if IS_ENABLED(CONFIG_OCTEONTX_SWITCH)
> +int sw_fdb_init(void)
> +{
> +	return 0;
> +}
> +
> +void sw_fdb_deinit(void)
> +{
> +}
> +
> +#endif

[ ... ]

> diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/switch/sw_nb.c b/drivers/net/ethernet/marvell/octeontx2/nic/switch/sw_nb.c
> new file mode 100644
> index 0000000000000..426a420119301
> --- /dev/null
> +++ b/drivers/net/ethernet/marvell/octeontx2/nic/switch/sw_nb.c
> @@ -0,0 +1,21 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/* Marvell RVU switch driver
> + *
> + * Copyright (C) 2026 Marvell.
> + *
> + */
> +#include "sw_nb.h"
> +
> +#if IS_ENABLED(CONFIG_OCTEONTX_SWITCH)
> +
> +int otx2_sw_nb_unregister(void)
> +{
> +	return 0;
> +}
> +
> +int otx2_sw_nb_register(void)
> +{
> +	return 0;
> +}
> +
> +#endif

[ ... ]

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Sashiko AI review · https://netdev-ai.bots.linux.dev/sashiko/#/patchset/20260831131944.2649362-1-rkannoth%40marvell.com