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From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
To: frank.li@nxp.com, l.stach@pengutronix.de, lpieralisi@kernel.org, 
 kwilczynski@kernel.org, mani@kernel.org, robh@kernel.org, 
 bhelgaas@google.com, s.hauer@pengutronix.de, kernel@pengutronix.de, 
 festevam@gmail.com, hongxing.zhu@oss.nxp.com
Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, 
 imx@lists.linux.dev, linux-kernel@vger.kernel.org, 
 Richard Zhu <hongxing.zhu@nxp.com>, Frank Li <Frank.Li@nxp.com>
In-Reply-To: <20260803034319.992323-1-hongxing.zhu@oss.nxp.com>
References: <20260803034319.992323-1-hongxing.zhu@oss.nxp.com>
Subject: Re: [PATCH v5] PCI: imx6: Update MPLLB bandwidth to improve i.MX95
 Gen3 PCIe stability
Message-Id: <178903665594.5136.3269558239888927735.b4-ty@b4>
Date: Thu, 10 Sep 2026 12:37:35 +0200
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On Mon, 03 Aug 2026 11:43:19 +0800, hongxing.zhu@oss.nxp.com wrote:
> We observed poor bandwidth margins during i.MX95 Gen3 PCIe tests with
> the default MPLLB_BANDWIDTH value (120). The margins worsened across
> voltage and temperature (VT) variations and different test matrices,
> potentially causing link stability issues.
> 
> Testing with MPLLB_BANDWIDTH value of 140 (0x8c) shows significant
> improvement in bandwidth margins across all VT conditions and test
> scenarios.
> 
> [...]

Applied, thanks!

[1/1] PCI: imx6: Update MPLLB bandwidth to improve i.MX95 Gen3 PCIe stability
      commit: 50901546f3bf9e76cc13d8146d1b1604a392a477

Best regards,
-- 
மணிவண்ணன் சதாசிவம்