From: Vinod Koul <vkoul@kernel.org>
To: Neil Armstrong <neil.armstrong@linaro.org>,
Aswath Govindraju <a-govindraju@ti.com>,
Swapnil Jakhade <sjakhade@cadence.com>,
Gregory CLEMENT <gregory.clement@bootlin.com>
Cc: "Théo Lebrun" <theo.lebrun@bootlin.com>,
"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
"Vladimir Kondratiev" <vladimir.kondratiev@mobileye.com>,
linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] phy: cadence: Sierra: Do not modify register when getting parent clock
Date: Sun, 13 Sep 2026 16:26:42 +0530 [thread overview]
Message-ID: <178929700263.215437.1287296789549951145.b4-ty@kernel.org> (raw)
In-Reply-To: <20260306-fix_sierra_get_parent-v2-1-cafe89ee5382@bootlin.com>
On Fri, 06 Mar 2026 11:23:58 +0100, Gregory CLEMENT wrote:
> The get_parent() callback for the PLL_CMNLC1 clock was incorrectly
> writing to the register while determining the parent clock index. This
> unintended register access forces the PHY back into training mode. If
> the PHY is already configured, this unexpected change prevents it from
> exiting training mode.
>
> Remove the register write operation to ensure the PHY remains stable
> during the get_parent() callback.
>
> [...]
Applied, thanks!
[1/1] phy: cadence: Sierra: Do not modify register when getting parent clock
commit: 02613aa974ccc84a5448573d253275baace95124
Best regards,
--
~Vinod
prev parent reply other threads:[~2026-09-13 10:56 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-06 10:23 Gregory CLEMENT
2026-03-06 10:29 ` Neil Armstrong
2026-08-12 13:37 ` Manivannan Sadhasivam
2026-09-13 10:56 ` Vinod Koul [this message]
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