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Bae" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/urgent] x86/microcode/intel: Reject problematic loading on Granite Rapids systems Cc: "Chang S. Bae" , "Borislav Petkov (AMD)" , Dave Hansen , stable@vger.kernel.org, x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260916225939.1144524-1-chang.seok.bae@intel.com> References: <20260916225939.1144524-1-chang.seok.bae@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <178969210882.1720534.495699346053864121.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/urgent branch of tip: Commit-ID: e7d3e2f46dd5a69046e6d95a0f189155a5516b93 Gitweb: https://git.kernel.org/tip/e7d3e2f46dd5a69046e6d95a0f189155a55= 16b93 Author: Chang S. Bae AuthorDate: Wed, 16 Sep 2026 22:59:39=20 Committer: Borislav Petkov (AMD) CommitterDate: Thu, 17 Sep 2026 16:54:20 -07:00 x86/microcode/intel: Reject problematic loading on Granite Rapids systems Microcode updates can usually jump revisions. However, there is an erratum on Granite Rapids systems. If they "jump over" revision 0x1000405, they result in an #MC. Avoid it. Signed-off-by: Chang S. Bae Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Dave Hansen Cc: stable@vger.kernel.org Link: https://patch.msgid.link/20260916225939.1144524-1-chang.seok.bae@intel.= com --- arch/x86/kernel/cpu/microcode/intel.c | 26 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+) diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/micr= ocode/intel.c index 1142183..9f09d38 100644 --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -309,6 +309,26 @@ static void save_microcode_patch(struct microcode_intel = *patch) pr_err("Unable to allocate microcode memory size: %u\n", size); } =20 +static bool revision_is_safe(struct cpu_signature *sig, u32 rev) +{ + u32 vfm =3D IFM(x86_family(sig->sig), x86_model(sig->sig)); + + /* + * Erratum GNR98 can cause #MCs if "jumping over" revision 0x1000405. + * Avoid the jumps. + */ + if (vfm =3D=3D INTEL_GRANITERAPIDS_X && + x86_stepping(sig->sig) =3D=3D 1 && + sig->pf & 0x95 && + sig->rev < 0x1000405 && + rev > 0x1000405) { + pr_err_once("Erratum GNR98: skipping revision 0x%x.\n", rev); + return false; + } + + return true; +} + /* Scan blob for microcode matching the boot CPUs family, model, stepping */ static __init struct microcode_intel *scan_microcode(void *data, size_t size, struct ucode_cpu_info *uci, @@ -330,6 +350,9 @@ static __init struct microcode_intel *scan_microcode(void= *data, size_t size, if (!intel_find_matching_signature(data, &uci->cpu_sig)) continue; =20 + if (!revision_is_safe(&uci->cpu_sig, mc_header->rev)) + continue; + /* * For saving the early microcode, find the matching revision which * was loaded on the BSP. @@ -878,6 +901,9 @@ static enum ucode_state parse_microcode_blobs(int cpu, st= ruct iov_iter *iter) if (!intel_find_matching_signature(mc, &uci->cpu_sig)) continue; =20 + if (!revision_is_safe(&uci->cpu_sig, mc_header.rev)) + continue; + is_safe =3D ucode_validate_minrev(&mc_header); if (force_minrev && !is_safe) continue;