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From: Jijie Shao <shaojijie@huawei.com>
To: hpp.iscas <hppiscas@163.com>, Jian Shen <shenjian15@huawei.com>
Cc: <shaojijie@huawei.com>, Andrew Lunn <andrew+netdev@lunn.ch>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	<netdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	Jiangfeng Xiao <xiaojiangfeng@huawei.com>
Subject: Re: [PATCH] net: hip04: use 16-bit byte order for HI13X1 TX fields
Date: Wed, 9 Sep 2026 19:25:37 +0800	[thread overview]
Message-ID: <178ff176-fa31-41d0-8681-54e6f8c77465@huawei.com> (raw)
In-Reply-To: <20260905132958.63085-1-hppiscas@163.com>


on 2026/9/5 21:29, hpp.iscas wrote:
> The HI13X1 transmit descriptor stores send_size and data_offset in u16
>
> fields, but hip04_mac_start_xmit() converts both values with
>
> cpu_to_be32() before assigning them. On little-endian systems the
>
> assignment truncates the converted value, leaving neither field with the
>
> intended 16-bit big-endian representation.
>
>
>
> Use cpu_to_be16() for the two HI13X1 fields. Keep the original 32-bit
>
> conversion for the other descriptor format.
>
>
>
> Fixes: d413779cdd93 ("net: hisilicon: Add an tx_desc to adapt HI13X1_GMAC")
>
> Signed-off-by: hpp.iscas <hppiscas@163.com>

Thanks!

Reviewed-by: Jijie Shao <shaojijie@huawei.com>

>
> ---
>
>   drivers/net/ethernet/hisilicon/hip04_eth.c | 5 +++--
>
>   1 file changed, 3 insertions(+), 2 deletions(-)
>
>
>
> diff --git a/drivers/net/ethernet/hisilicon/hip04_eth.c b/drivers/net/ethernet/hisilicon/hip04_eth.c
>
> index fc2c47d..2920985 100644
>
> --- a/drivers/net/ethernet/hisilicon/hip04_eth.c
>
> +++ b/drivers/net/ethernet/hisilicon/hip04_eth.c
>
> @@ -527,13 +527,14 @@ hip04_mac_start_xmit(struct sk_buff *skb, struct net_device *ndev)
>
>   	priv->tx_skb[tx_head] = skb;
>
>   	priv->tx_phys[tx_head] = phys;
>
>   
>
> -	desc->send_size = (__force u32)cpu_to_be32(skb->len);
>
>   #if defined(CONFIG_HI13X1_GMAC)
>
> +	desc->send_size = (__force u16)cpu_to_be16(skb->len);
>
>   	desc->cfg = (__force u32)cpu_to_be32(TX_CLEAR_WB | TX_FINISH_CACHE_INV
>
>   		| TX_RELEASE_TO_PPE | priv->port << TX_POOL_SHIFT);
>
> -	desc->data_offset = (__force u32)cpu_to_be32(phys & SOC_CACHE_LINE_MASK);
>
> +	desc->data_offset = (__force u16)cpu_to_be16(phys & SOC_CACHE_LINE_MASK);
>
>   	desc->send_addr =  (__force u32)cpu_to_be32(phys & ~SOC_CACHE_LINE_MASK);
>
>   #else
>
> +	desc->send_size = (__force u32)cpu_to_be32(skb->len);
>
>   	desc->cfg = (__force u32)cpu_to_be32(TX_CLEAR_WB | TX_FINISH_CACHE_INV);
>
>   	desc->send_addr = (__force u32)cpu_to_be32(phys);
>
>   #endif
>
>

      parent reply	other threads:[~2026-09-09 11:25 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-05 13:29 hpp.iscas
2026-09-08 13:11 ` Simon Horman
2026-09-09 11:25 ` Jijie Shao [this message]

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