mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: patchwork-bot+linux-riscv@kernel.org
To: Jia Wang <wangjia@ultrarisc.com>
Cc: linux-riscv@lists.infradead.org, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org, pjw@kernel.org,
	palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr,
	daniel.lezcano@kernel.org, tglx@kernel.org,
	samuel.holland@sifive.com, anup@brainfault.org,
	broonie@kernel.org, andi.shyti@kernel.org,
	mika.westerberg@linux.intel.com, Eugeniy.Paltsev@synopsys.com,
	vkoul@kernel.org, Frank.Li@kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	paul.walmsley@sifive.com, palmer@sifive.com, conor@kernel.org,
	linux-spi@vger.kernel.org, linux-i2c@vger.kernel.org,
	dmaengine@vger.kernel.org, conor.dooley@microchip.com
Subject: Re: [PATCH v2 00/10] riscv: Add device tree support for UltraRISC DP1000
Date: Sun, 01 Nov 2026 22:16:53 +0000	[thread overview]
Message-ID: <179357141329.2624073.10814218023350815293.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <20260907-ultrarisc-dts-v2-0-5eb4c97477c5@ultrarisc.com>

Hello:

This series was applied to riscv/linux.git (fixes)
by Vinod Koul <vkoul@kernel.org>:

On Mon, 07 Sep 2026 17:54:39 +0800 you wrote:
> Add Devicetree support for the UltraRISC DP1000 RISC-V SoC and two
> DP1000-based motherboards: Shenzhen Rongda M0 and Milk-V Titan.
> 
> DP1000 integrates eight UltraRISC CP100 CPU cores.  The SoC description
> includes the CPU and cache topology, CLINT, PLIC, clock controller,
> pinctrl, GPIO, four UARTs, two SPI controllers, four I2C controllers,
> three PCIe root complexes, GMAC, and the DMA controller.
> 
> [...]

Here is the summary with links:
  - [v2,01/10] dt-bindings: vendor-prefixes: Add shenrongda
    (no matching commit)
  - [v2,02/10] dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible
    (no matching commit)
  - [v2,03/10] dt-bindings: riscv: Add UltraRISC DP1000 board compatibles
    (no matching commit)
  - [v2,04/10] dt-bindings: timer: Add UltraRISC DP1000 CLINT
    (no matching commit)
  - [v2,05/10] spi: dt-bindings: snps,dw-apb-ssi: Add compatible for UltraRISC DP1000 SoC
    (no matching commit)
  - [v2,06/10] dt-bindings: i2c: dw: Add compatible for UltraRISC DP1000 SoC
    https://git.kernel.org/riscv/c/3d067add1281
  - [v2,07/10] dt-bindings: dma: snps,dw-axi-dmac: Add UltraRISC DP1000 compatible
    https://git.kernel.org/riscv/c/58a66a560aa1
  - [v2,08/10] riscv: dts: ultrarisc: Add initial device tree for UltraRISC DP1000
    (no matching commit)
  - [v2,09/10] riscv: dts: ultrarisc: Add Shenzhen Rongda M0 board device tree
    (no matching commit)
  - [v2,10/10] riscv: dts: ultrarisc: Add Milk-V Titan board device tree
    (no matching commit)

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html



      parent reply	other threads:[~2026-11-01 22:16 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-07  9:54 Jia Wang via B4 Relay
2026-09-07  9:54 ` [PATCH v2 01/10] dt-bindings: vendor-prefixes: Add shenrongda Jia Wang via B4 Relay
2026-09-07  9:54 ` [PATCH v2 02/10] dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible Jia Wang via B4 Relay
2026-09-07  9:54 ` [PATCH v2 03/10] dt-bindings: riscv: Add UltraRISC DP1000 board compatibles Jia Wang via B4 Relay
2026-09-07  9:54 ` [PATCH v2 04/10] dt-bindings: timer: Add UltraRISC DP1000 CLINT Jia Wang via B4 Relay
2026-09-07  9:54 ` [PATCH v2 05/10] spi: dt-bindings: snps,dw-apb-ssi: Add compatible for UltraRISC DP1000 SoC Jia Wang via B4 Relay
2026-09-07 17:55   ` Conor Dooley
2026-09-07  9:54 ` [PATCH v2 06/10] dt-bindings: i2c: dw: " Jia Wang via B4 Relay
2026-09-07 17:54   ` Conor Dooley
2026-09-08  9:48   ` Mika Westerberg
2026-09-09 16:54   ` Andi Shyti
2026-09-07  9:54 ` [PATCH v2 07/10] dt-bindings: dma: snps,dw-axi-dmac: Add UltraRISC DP1000 compatible Jia Wang via B4 Relay
2026-09-07 17:55   ` Conor Dooley
2026-09-07  9:54 ` [PATCH v2 08/10] riscv: dts: ultrarisc: Add initial device tree for UltraRISC DP1000 Jia Wang via B4 Relay
2026-09-07  9:54 ` [PATCH v2 09/10] riscv: dts: ultrarisc: Add Shenzhen Rongda M0 board device tree Jia Wang via B4 Relay
2026-09-07  9:54 ` [PATCH v2 10/10] riscv: dts: ultrarisc: Add Milk-V Titan " Jia Wang via B4 Relay
2026-09-08 15:34 ` (subset) [PATCH v2 00/10] riscv: Add device tree support for UltraRISC DP1000 Mark Brown
2026-09-09 12:41 ` Vinod Koul
2026-11-01 22:16 ` patchwork-bot+linux-riscv [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=179357141329.2624073.10814218023350815293.git-patchwork-notify@kernel.org \
    --to=patchwork-bot+linux-riscv@kernel.org \
    --cc=Eugeniy.Paltsev@synopsys.com \
    --cc=Frank.Li@kernel.org \
    --cc=alex@ghiti.fr \
    --cc=andi.shyti@kernel.org \
    --cc=anup@brainfault.org \
    --cc=aou@eecs.berkeley.edu \
    --cc=broonie@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=conor.dooley@microchip.com \
    --cc=conor@kernel.org \
    --cc=daniel.lezcano@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=dmaengine@vger.kernel.org \
    --cc=krzk+dt@kernel.org \
    --cc=linux-i2c@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=linux-spi@vger.kernel.org \
    --cc=mika.westerberg@linux.intel.com \
    --cc=palmer@dabbelt.com \
    --cc=palmer@sifive.com \
    --cc=paul.walmsley@sifive.com \
    --cc=pjw@kernel.org \
    --cc=robh@kernel.org \
    --cc=samuel.holland@sifive.com \
    --cc=tglx@kernel.org \
    --cc=vkoul@kernel.org \
    --cc=wangjia@ultrarisc.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®