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From: patchwork-bot+linux-riscv@kernel.org
To: Guobin Zhang <guobin.zhang@intel.com>
Cc: linux-riscv@lists.infradead.org, pjw@kernel.org,
	palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr,
	tchiu@tenstorrent.com, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] riscv: signal: protect regs->status RMW from concurrent preemption
Date: Tue, 10 Nov 2026 02:55:29 +0000	[thread overview]
Message-ID: <179427932911.3612825.4959198191364939243.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <20261020-vector_fpu_regs_status_rmw_fix-v2-1-474a59155e96@intel.com>

Hello:

This patch was applied to riscv/linux.git (fixes)
by Paul Walmsley <pjw@kernel.org>:

On Tue, 20 Oct 2026 19:24:25 +0800 you wrote:
> __fstate_clean() performs a non-atomic read-modify-write (RMW) on
> task_pt_regs(current)->status to clear the FS bits. This RMW is
> unprotected - it runs with preemption enabled and IRQs on during
> signal delivery (setup_rt_frame -> fstate_save) and sigreturn
> (restore_fp_state -> fstate_restore).
> 
> If a reschedule IPI or timer interrupt triggers preemption between
> the load and store of this RMW, __switch_to_vector() calls
> riscv_v_vstate_set_restore() which modifies the VS bits of the
> same regs->status. When the preempted task resumes, it stores back
> the stale value captured before preemption, overwriting the VS
> update and restoring VS=DIRTY while TIF_RISCV_V_DEFER_RESTORE
> remains set - a combination that should never occur and leads to
> vector state corruption.
> 
> [...]

Here is the summary with links:
  - [v2] riscv: signal: protect regs->status RMW from concurrent preemption
    https://git.kernel.org/riscv/c/d1a8d411533d

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
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      parent reply	other threads:[~2026-11-10  2:55 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-20 11:24 Guobin Zhang
2026-10-22 23:04 ` Andy Chiu
2026-11-10  2:11 ` Paul Walmsley
2026-11-10  2:55 ` patchwork-bot+linux-riscv [this message]

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