From: Chen-Yu Tsai <wens@kernel.org>
To: andrew@lunn.ch, jernej.skrabec@gmail.com, samuel@sholland.org,
Roman Riabenko <roman@riabenko.com>
Cc: andre.przywara@arm.com, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] arm64: dts: allwinner: a64: olinuxino: Fix phy-mode
Date: Sun, 15 Nov 2026 19:35:14 +0800 [thread overview]
Message-ID: <179474251421.3095306.4655080143943626806.b4-ty@kernel.org> (raw)
In-Reply-To: <20260822052353.22881-1-roman@riabenko.com>
On Sat, 22 Aug 2026 08:23:53 +0300, Roman Riabenko wrote:
> The 'rgmii' mode does not appear to describe the RGMII timing in Olimex
> A64-OlinuXino boards. The PCB layout shows that the clock and data
> traces have roughly the same lengths for both RX and TX and, thus, do
> not appear to implement the 2 ns RGMII delay or introduce any
> significant delay.
>
> According to the KSZ9031RNX datasheet, the PHY adds a typical 1.2 ns RX
> delay and no TX delay by default. The 'rgmii-id' mode causes the PHY
> driver to enable appropriate internal RGMII delays.
>
> [...]
Applied to sunxi/dt-for-7.5 in sunxi, thanks!
[1/1] arm64: dts: allwinner: a64: olinuxino: Fix phy-mode
https://git.kernel.org/sunxi/linux/c/5f30c467fb36
Best regards,
--
Chen-Yu Tsai <wens@kernel.org>
prev parent reply other threads:[~2026-11-15 11:35 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-22 5:23 Roman Riabenko
2026-08-22 14:53 ` Andrew Lunn
2026-11-13 14:56 ` Roman Riabenko
2026-11-15 11:35 ` Chen-Yu Tsai [this message]
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