Re: [PATCH] arm64: dts: qcom: talos: add ETR device

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 1/26/26 2:25 AM, Jie Gan wrote:
> 
> 
> On 1/23/2026 10:29 PM, Rob Herring wrote:
>>
>> On Fri, 23 Jan 2026 15:10:46 +0800, Jie Gan wrote:
>>> Add the TMC ETR device to store collected trace data in DDR memory.
>>>
>>> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
>>> ---
>>>   arch/arm64/boot/dts/qcom/talos.dtsi | 27 +++++++++++++++++++++++++++
>>>   1 file changed, 27 insertions(+)
>>>
>>
>>
>> My bot found new DTB warnings on the .dts files added or changed in this
>> series.
>>
>> Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
>> are fixed by another series. Ultimately, it is up to the platform
>> maintainer whether these warnings are acceptable or not. No need to reply
>> unless the platform maintainer has comments.
>>
>> If you already ran DT checks and didn't see these error(s), then
>> make sure dt-schema is up to date:
>>
>>    pip3 install dtschema --upgrade
>>
>>
>> This patch series was applied (using b4) to base:
>>   Base: a0c666c25aeefd16f4b088c6549a6fb6b65a8a1d (use --merge-base to override)
>>
>> If this is not the correct base, please add 'base-commit' tag
>> (or use b4 which does this automatically)
>>
>>
>> New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/qcom/' for 20260123-enable-etr-and-ctcu-devices-v1-1-5fbb3423a2d7@oss.qualcomm.com:
>>
>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: clock-controller@100000 (qcom,qcs615-gcc): 'clock-names' is a required property
>>     from schema $id: http://devicetree.org/schemas/clock/qcom,qcs615-gcc.yaml
> 
> Hi Rob,
> 
> This warning is not introduced by my patch. I think it's a false positive.

The bot checks for any warnings on the file, as ideally there would
be none. This one is indeed pre-existing.

Konrad