From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8B55838F80; Wed, 21 May 2025 13:30:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747834255; cv=none; b=hDiSOOk7mF3yAbrxv/zZudH0M0cNiILes2DBlIOQ6clmHFT3RNcOOuDCWZJWh8U4Yx9KLh+V4gJHK4/Hf1rOTxsgxopt8xNV/n9dFt8Mv63TI0IzzhsU6JgORegbq0nlpsUALrTiD/TUxNevKSbbHqWRX4pZLijShF9bo+STrA0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747834255; c=relaxed/simple; bh=FbftMvFzXBf+sBlRHMUppUqDkvlQbcnS3dG1NEYpdxE=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=rpbH4eJykIa2ZTJMkaJpRdiB3PcGzfnaFXzgcDkiPlDMtSxusMiVqE+nYuf/+UeJxKQPiz3R51BUBjgKr3LKQMSQrFG5+xOd5jn3W3v6oX0Z+T1eMUcABhEYORck0L/tHQnIkw2G9ynb3jEG+FwhM67SwSEVAMbJG5dJTNKJ5iY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=G8aP/npv; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="G8aP/npv" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1F868C4CEE4; Wed, 21 May 2025 13:30:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747834255; bh=FbftMvFzXBf+sBlRHMUppUqDkvlQbcnS3dG1NEYpdxE=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=G8aP/npvm651s6qpzUgatkERAVuimNo5EZyl+sPW/pLYwNl9E3B/ZFVmk4lhc4OmS scM5zQ9uYZCxDqI+crmbSP8FaACKqA6gYYn/60q6vnHnJEXs9t5hU+XzCToysw9rkk U91M4Xq+GgR2SKfiyGYqttR9xqtP4FerzZ0Q44xKAUie3ziIY69llrTj4huuRjJ3Xr ygvDp2U1T9Z/WPtXeVtnU+5PtRdBWH8dBgX7rSlIyP+x7cqySOpR7JGPfYdyBxa7bM Kl7kj/Quwph9EAFOdBCJH1wjZI5uxDQeYbX43UkM85OA27jnzAiPe//pukxU9YML07 vzthoMfjuFFAw== Message-ID: <17a9ee62-8185-4833-acfc-1639fd17efc5@kernel.org> Date: Wed, 21 May 2025 15:30:50 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/3] pwm: axi-pwmgen: add support for external clock To: David Lechner Cc: Michael Hennerich , =?UTF-8?Q?Nuno_S=C3=A1?= , Trevor Gamblin , =?UTF-8?Q?Uwe_Kleine-K=C3=B6nig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250520-pwm-axi-pwmgen-add-external-clock-v1-0-6cd63cc001c8@baylibre.com> <20250520-pwm-axi-pwmgen-add-external-clock-v1-3-6cd63cc001c8@baylibre.com> <20250521-nostalgic-pretty-hedgehog-d08a77@kuoka> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 21/05/2025 15:23, David Lechner wrote: > On 5/21/25 5:10 AM, Krzysztof Kozlowski wrote: >> On Tue, May 20, 2025 at 04:00:46PM GMT, David Lechner wrote: >>> Add support for external clock to the AXI PWM generator driver. >>> >>> In most cases, there is a separate external clock that drives the PWM >>> output separate from the peripheral clock. This allows enabling both >>> clocks. >>> >>> Signed-off-by: David Lechner >>> --- >>> drivers/pwm/pwm-axi-pwmgen.c | 23 ++++++++++++++++++++--- >>> 1 file changed, 20 insertions(+), 3 deletions(-) >>> >>> diff --git a/drivers/pwm/pwm-axi-pwmgen.c b/drivers/pwm/pwm-axi-pwmgen.c >>> index 4337c8f5acf055fc87dc134f2a70b99b0cb5ede6..67992a7561ec0440b1c1fa327f844a0602872771 100644 >>> --- a/drivers/pwm/pwm-axi-pwmgen.c >>> +++ b/drivers/pwm/pwm-axi-pwmgen.c >>> @@ -280,9 +280,26 @@ static int axi_pwmgen_probe(struct platform_device *pdev) >>> ddata = pwmchip_get_drvdata(chip); >>> ddata->regmap = regmap; >>> >>> - clk = devm_clk_get_enabled(dev, NULL); >>> - if (IS_ERR(clk)) >>> - return dev_err_probe(dev, PTR_ERR(clk), "failed to get clock\n"); >>> + /* When clock-names is present, there is a separate ext clock. */ >>> + if (device_property_present(dev, "clock-names")) { >> >> No. List is ordered, you do not need such dance at all. > > I should have added more to the comment here. This is also needed for > backwards compatibility where only what should be the "ext" clock is > given as clocks = <&spi_clk>; and the AXI clock was missing. I do not see this needed at all. That's already handled by old code. You only need to take new optional, second clock - axi clk. You take it by index. Best regards, Krzysztof