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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id b20-20020a2ebc14000000b0026c15d60ad1sm78103ljf.132.2022.09.18.02.32.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 18 Sep 2022 02:32:04 -0700 (PDT) Message-ID: <17cacc6f-173f-ad6c-9056-1b17635c984d@linaro.org> Date: Sun, 18 Sep 2022 10:31:55 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.13.0 Subject: Re: [PATCH v2 1/6] dt-bindings: arm: mediatek: mmsys: change compatible for MT8195 Content-Language: en-US To: Jason-JH Lin , Matthias Brugger , Chun-Kuang Hu , Rob Herring , Krzysztof Kozlowski , AngeloGioacchino Del Regno Cc: CK Hu , Rex-BC Chen , Singo Chang , Nancy Lin , dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Project_Global_Chrome_Upstream_Group@mediatek.com References: <20220915161817.10307-1-jason-jh.lin@mediatek.com> <20220915161817.10307-2-jason-jh.lin@mediatek.com> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 16/09/2022 04:34, Jason-JH Lin wrote: > Hi Matthias, > > Thanks for the review. > > On Fri, 2022-09-16 at 00:05 +0200, Matthias Brugger wrote: >> >> On 15/09/2022 18:18, Jason-JH.Lin wrote: >>> For previous MediaTek SoCs, such as MT8173, there are 2 display HW >>> pipelines binding to 1 mmsys with the same power domain, the same >>> clock driver and the same mediatek-drm driver. >>> >>> For MT8195, VDOSYS0 and VDOSYS1 are 2 display HW pipelines binding >>> to >>> 2 different power domains, different clock drivers and different >>> mediatek-drm drivers. >>> >>> Moreover, Hardware pipeline of VDOSYS0 has these components: COLOR, >>> CCORR, AAL, GAMMA, DITHER. They are related to the PQ (Picture >>> Quality) >>> and they makes VDOSYS0 supports PQ function while they are not >>> including in VDOSYS1. >>> >>> Hardware pipeline of VDOSYS1 has the component ETHDR (HDR related >>> component). It makes VDOSYS1 supports the HDR function while it's >>> not >>> including in VDOSYS0. >>> >>> To summarize0: >>> Only VDOSYS0 can support PQ adjustment. >>> Only VDOSYS1 can support HDR adjustment. >>> >>> Therefore, we need to separate these two different mmsys hardwares >>> to >>> 2 different compatibles for MT8195. >>> >>> Fixes: 81c5a41d10b9 ("dt-bindings: arm: mediatek: mmsys: add mt8195 >>> SoC binding") >>> Signed-off-by: Jason-JH.Lin >>> Signed-off-by: Bo-Chen Chen >>> --- >>> .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | >>> 2 +- >>> 1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git >>> a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam >>> l >>> b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam >>> l >>> index 6ad023eec193..0e267428eaa6 100644 >>> --- >>> a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam >>> l >>> +++ >>> b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam >>> l >>> @@ -31,7 +31,7 @@ properties: >>> - mediatek,mt8183-mmsys >>> - mediatek,mt8186-mmsys >>> - mediatek,mt8192-mmsys >>> - - mediatek,mt8195-mmsys >>> + - mediatek,mt8195-vdosys0 >> >> Nack, we miss the fallback compatible, as I already said twice. >> >> Regards, >> Matthias > > I'm sorry this happened again. > I'll keep the compatible "mediatek,mt8195-mmsys" at next version. > > The patch "dt-bindings: arm: mediatek: mmsys: remove the unused > compatible for mt8195" should be sent after accepting the vdosys1 > series, right? I don't think there will be no such patch... You need to add a bindings change which will accept device nodes like: foo { compatible = "mediatek,mt8195-vdosys0", "mediatek,mt8195-mmsys"; } Example-schema shows how to do it. Best regards, Krzysztof