From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754213AbcGVN3w (ORCPT ); Fri, 22 Jul 2016 09:29:52 -0400 Received: from us01smtprelay-2.synopsys.com ([198.182.47.9]:52110 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754156AbcGVN3u (ORCPT ); Fri, 22 Jul 2016 09:29:50 -0400 From: Joao Pinto To: helgaas@kernel.org, jingoohan1@gmail.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, jszhang@marvell.com, CARLOS.PALMINHA@synopsys.com, MiguelFalcao.Sousa@synopsys.com, Joao Pinto Subject: [PATCH v2 2/2] pcie-designware: add core version Date: Fri, 22 Jul 2016 14:29:39 +0100 Message-Id: <17d796c59a2b63a494d1695a4d04ed6fc9f93c0c.1469193895.git.jpinto@synopsys.com> X-Mailer: git-send-email 1.8.1.5 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Joao Pinto --- changes v1->v2: - Nothing changed. Just to keep up the patch set version. drivers/pci/host/pcie-designware.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c index 9135725..3e4c600 100644 --- a/drivers/pci/host/pcie-designware.c +++ b/drivers/pci/host/pcie-designware.c @@ -34,6 +34,10 @@ #define LINK_WAIT_IATU_MIN 9000 #define LINK_WAIT_IATU_MAX 10000 +/* Core version (available from core 4.70) */ +#define PCIE_CORE_VERSION 0x8F8 +#define PCIE_CORE_VERSION_480A 0x3438302a + /* Synopsys specific PCIE configuration registers */ #define PCIE_PORT_LINK_CONTROL 0x710 #define PORT_LINK_MODE_MASK (0x3f << 16) -- 1.8.1.5