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[195.231.45.245]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49cdce10153sm76476035e9.4.2026.09.01.06.59.05 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 01 Sep 2026 06:59:07 -0700 (PDT) Message-ID: <17e50070-46c9-46dd-8109-95007a4f681f@redhat.com> Date: Tue, 1 Sep 2026 15:59:04 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH net-next 3/3] net: phy: motorcomm: Enable analog frontend on YT8531S To: Maxime Chevallier , Andrew Lunn , Jakub Kicinski , davem@davemloft.net, Eric Dumazet , Simon Horman , Maxime Coquelin , Alexandre Torgue , Russell King , Heiner Kallweit , Yao Zi , Frank Cc: thomas.petazzoni@bootlin.com, =?UTF-8?Q?Alexis_Lothor=C3=A9?= , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com References: <20260831073747.361482-1-maxime.chevallier@bootlin.com> <20260831073747.361482-4-maxime.chevallier@bootlin.com> From: Paolo Abeni Content-Language: en-US In-Reply-To: <20260831073747.361482-4-maxime.chevallier@bootlin.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 8/31/26 9:37 AM, Maxime Chevallier wrote: > The YT6801 PCIe NIC includes the dwmac-motorcomm IP for the MAC part, as > well as a YT8531S PHY, configured in GMII mode. > > It seems this PHY requires the Analog Front-end (AFE) DAC clock to be > enabled for link to reliably establish, otherwise the link just doesn't > come up. > > Let's enable it at config_init(). > > This logic has been extracted from the vendor driver provided by > Motorcomm. > > It's really unclear if this is specific to the integrated version of > that PHY, and how this potentially interacts with the fiber mode this > PHY supports, so this configuration is only enabled when the interface > is GMII, i.e. the PHY is integrated. > > With this, the PHY reliably establishes link and the YT6801 PCIe card > becomes fully functional. > > Signed-off-by: Maxime Chevallier > --- > drivers/net/phy/motorcomm.c | 14 +++++++++++++- > 1 file changed, 13 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/phy/motorcomm.c b/drivers/net/phy/motorcomm.c > index 36c229460a77..90a4f86f2758 100644 > --- a/drivers/net/phy/motorcomm.c > +++ b/drivers/net/phy/motorcomm.c > @@ -144,6 +144,11 @@ > #define YT8521_CLOCK_GATING_REG 0xC > #define YT8521_CGR_RX_CLK_EN BIT(12) > > +/* Analog front-end control register 3 */ > +#define YT8531S_EXT_AFE_CTRL3 0x12 > +/* Analog front-end DAC clock enable */ > +#define YT8531S_AFE_CTRL3_CLKDAC_AON BIT(13) > + > #define YT8521_EXTREG_SLEEP_CONTROL1_REG 0x27 > #define YT8521_ESC1R_SLEEP_SW BIT(15) > #define YT8521_ESC1R_PLLON_SLP BIT(14) > @@ -1740,8 +1745,15 @@ static int yt8531s_config_init(struct phy_device *phydev) > if (ret) > goto err_restore_page; > > - if (phy_interface_is_rgmii(phydev)) > + if (phy_interface_is_rgmii(phydev)) { > ret = yt8531_set_ds(phydev); > + if (ret) > + goto err_restore_page; > + } > + > + if (phydev->interface == PHY_INTERFACE_MODE_GMII) > + ret = ytphy_modify_ext(phydev, YT8531S_EXT_AFE_CTRL3, > + 0, YT8531S_AFE_CTRL3_CLKDAC_AON); Sashiko suspects this will not survive a suspend/resume: https://netdev-ai.bots.linux.dev/sashiko/#/patchset/20260831073747.361482-1-maxime.chevallier%40bootlin.com /P